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[209.132.180.67]) by mx.google.com with ESMTP id hu10si13810780pbc.14.2014.04.21.18.36.21; Mon, 21 Apr 2014 18:36:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753172AbaDVBgO (ORCPT + 1 other); Mon, 21 Apr 2014 21:36:14 -0400 Received: from mail-pd0-f182.google.com ([209.85.192.182]:43472 "EHLO mail-pd0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751285AbaDVBgJ (ORCPT ); Mon, 21 Apr 2014 21:36:09 -0400 Received: by mail-pd0-f182.google.com with SMTP id y10so4296486pdj.27 for ; Mon, 21 Apr 2014 18:36:09 -0700 (PDT) X-Received: by 10.66.141.144 with SMTP id ro16mr6361894pab.131.1398130569203; Mon, 21 Apr 2014 18:36:09 -0700 (PDT) Received: from localhost.localdomain ([140.206.182.114]) by mx.google.com with ESMTPSA id my6sm80935421pbc.36.2014.04.21.18.36.01 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Apr 2014 18:36:08 -0700 (PDT) From: Haojian Zhuang To: xuwei5@hisilicon.com, linus.walleij@linaro.org, grant.likely@linaro.org, robh+dt@kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, baruch@tkos.co.il Cc: Haojian Zhuang Subject: [PATCH 2/2] ARM: dts: add gpio alias in hi3620 dts file Date: Tue, 22 Apr 2014 09:35:43 +0800 Message-Id: <1398130543-19454-2-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1398130543-19454-1-git-send-email-haojian.zhuang@linaro.org> References: <1398130543-19454-1-git-send-email-haojian.zhuang@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-gpio@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: haojian.zhuang@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use gpio alias to identify the index of gpio chip. Then we can keep the same gpio number as schematics. Otherwise, gpio number is countered from bottom to top. Signed-off-by: Haojian Zhuang --- arch/arm/boot/dts/hi3620.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index 6836795..2aaae09 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -21,6 +21,28 @@ serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + gpio5 = &gpio5; + gpio6 = &gpio6; + gpio7 = &gpio7; + gpio8 = &gpio8; + gpio9 = &gpio9; + gpio10 = &gpio10; + gpio11 = &gpio11; + gpio12 = &gpio12; + gpio13 = &gpio13; + gpio14 = &gpio14; + gpio15 = &gpio15; + gpio16 = &gpio16; + gpio17 = &gpio17; + gpio18 = &gpio18; + gpio19 = &gpio19; + gpio20 = &gpio20; + gpio21 = &gpio21; }; pclk: clk {