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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id g80-20020a0ddd53000000b00545a08184b0sm3942619ywe.64.2023.04.05.08.45.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Apr 2023 08:45:50 -0700 (PDT) From: William Breathitt Gray To: Linus Walleij , Bartosz Golaszewski Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko , Mark Brown , William Breathitt Gray , techsupport@winsystems.com, pdemetrotion@winsystems.com, quarium@gmail.com, jhentges@accesio.com, jay.dolan@accesio.com Subject: [PATCH v6 0/3] Migrate the PCIe-IDIO-24 and WS16C48 GPIO drivers to the regmap API Date: Wed, 5 Apr 2023 11:45:41 -0400 Message-Id: X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Changes in v6: - Wrap lines to 80 characters rather than 100 for set_type_config() - Remove regmap_config max_register lines as superfluous - Enable use_raw_spinlock to prevent deadlocks when running -rt kernels - Check regmap_update_bit() ret value before goto exit_unlock - Rename exit_early label to the more descriptive exit_unlock - Add sparse annotations for lock acquire/release in ws16c48_handle_pre_irq() and ws16c48_handle_post_irq() - Explicitly add 0 to WS16C48_ENAB in ws16c48_irq_init_hw() for sake of symmetry to match the other WS16C48_ENAB operations Changes in v5: - Refactor for map parameter removal from handle_mask_sync() - Cleanups and line wrappings to 100 characters rather than 80 - Adjust to change mutex/spinlock_t type locks to raw_spin_lock_t type - Remove pex8311_intcsr table configurations as superfluous - Adjust to set pex8311_intcsr_regmap_config reg_base to PLX_PEX8311_PCI_LCS_INTCSR - Rename PAGE_FIELD_PAGE_* defines to POL_PAGE, ENAB_PAGE, and INT_ID_PAGE Changes in v4: - Allocate idio24gpio before using it in idio_24_probe() Changes in v3: - Drop map from set_type_config() parameter list; regmap can be passed by irq_drv_data instead - Adjust idio_24_set_type_config() for parameter list - Add mutex to prevent clobbering the COS_ENABLE register when masking IRQ and setting their type configuration Changes in v2: - Simplify PCIe-IDIO-24 register offset defines to remove superfluous arithmetic - Check for NULL pointer after chip->irq_drv_data allocation - Set gpio_regmap drvdata and use gpio_regmap_get_drvdata() to get the regmap in idio_24_reg_map_xlate() The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. A patch to pass irq_drv_data as a parameter for struct regmap_irq_chip set_type_config() is included. This is needed by the idio_24_set_type_config() and ws16c48_set_type_config() callbacks in order to update the type configuration on their respective devices. This patchset depends on the "Drop map from handle_mask_sync() parameters" patchset [0]. [0] https://lore.kernel.org/all/cover.1679323449.git.william.gray@linaro.org/ William Breathitt Gray (3): regmap: Pass irq_drv_data as a parameter for set_type_config() gpio: pcie-idio-24: Migrate to the regmap API gpio: ws16c48: Migrate to the regmap API drivers/base/regmap/regmap-irq.c | 8 +- drivers/gpio/Kconfig | 6 + drivers/gpio/gpio-pcie-idio-24.c | 677 +++++++++++-------------------- drivers/gpio/gpio-ws16c48.c | 552 +++++++++---------------- include/linux/regmap.h | 6 +- 5 files changed, 447 insertions(+), 802 deletions(-) base-commit: 7b59bdbc3965ca8add53e084af394c13a2be22a8 prerequisite-patch-id: cd19046150b7cff1be4ac7152198777aa960a3df prerequisite-patch-id: bd3e3830d9ce4f3876a77483364d7190b7fdffa7