From patchwork Fri Apr 22 07:29:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 565088 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 733BAC433EF for ; Fri, 22 Apr 2022 07:30:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352010AbiDVHdA (ORCPT ); Fri, 22 Apr 2022 03:33:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1444863AbiDVHcc (ORCPT ); Fri, 22 Apr 2022 03:32:32 -0400 Received: from laurent.telenet-ops.be (laurent.telenet-ops.be [IPv6:2a02:1800:110:4::f00:19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E14205158B for ; Fri, 22 Apr 2022 00:29:37 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:2928:9f72:c4af:fbd9]) by laurent.telenet-ops.be with bizsmtp id MjVa270072Ah9RF01jVafY; Fri, 22 Apr 2022 09:29:34 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1nhnjR-001acD-Mg; Fri, 22 Apr 2022 09:29:33 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1nhnjR-00CIuS-4i; Fri, 22 Apr 2022 09:29:33 +0200 From: Geert Uytterhoeven To: Linus Walleij , Yoshihiro Shimoda , Wolfram Sang , Laurent Pinchart Cc: linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 0/2] pinctrl: renesas: rcar-gen4: Fix GPIO function on I2C-capable pins Date: Fri, 22 Apr 2022 09:29:29 +0200 Message-Id: X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi all, Configuring I2C-capable pins for GPIO may not work on R-Car V3U and S4-8, as R-Car Gen4 SoCs need additional configuration in a Module Select Register (MODSELn) register, which is currently missing from the pin control subdrivers. Hence when using i2c-gpio instead of i2c-rcar using the commented-out patch below, I2C - fails on the Spider development board (with R-Car S4-8), as the firmware/bootloader has configured the corresponding MODSEL bits for I2C, - still works on the Falcon development board (with R-Car V3U), as the firmware/bootloader has configured the corresponding MODSEL bits for GPIO. It can be made to fail by changing the MODSEL bits from U-Boot, before booting Linux: 1. Write ffff0000 to e6050800 (unlock PMMR using inverted value), 2. Write 0000ffff to e6050900 (enable I2C functions in MODSEL). This patch series adds the missing configuration, by temporarily overriding the GP_*_FN function enums to expand to two enums: the original GP_*_FN enum to configure the GSPR register bits, and the missing FN_SEL_I2Cn_0 enum to configure the MODSEL register bits. I picked this solution as it is simpler than the alternative, which would be: 1. Add a copy of the CPU_ALL_GP() macro to describe all GPIO pins that are not I2C-capable, 2. Add a copy of the PINMUX_DATA_GP_ALL() macro to emit mark/function enums in pinmux_data[] for GPIO pins that are not I2C-capable, 3. Add a copy of the _GP_DATA() macro to emit mark/function enums in pinmux_data[] for an I2C-capable GPIO pin, 4. Invoke the macro above for all I2C-capable GPIO pins. I intend to queue this in renesas-pinctrl-for-v5.19. Thanks for your comments! Geert Uytterhoeven (2): pinctrl: renesas: r8a779a0: Fix GPIO function on I2C-capable pins pinctrl: renesas: r8a779f0: Fix GPIO function on I2C-capable pins drivers/pinctrl/renesas/pfc-r8a779a0.c | 29 ++++++++++++++++++++++++++ drivers/pinctrl/renesas/pfc-r8a779f0.c | 21 +++++++++++++++++++ 2 files changed, 50 insertions(+)