From patchwork Thu Sep 19 16:05:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 829914 Received: from mail-pj1-f42.google.com (mail-pj1-f42.google.com [209.85.216.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B25DE19FA72; Thu, 19 Sep 2024 16:15:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726762543; cv=none; b=g0eV4XpfbRIgo+UVPSglb9sMcO3LAyjz0uH0t5JQ/eNCcarQTLZxAIvtWYRMpeEtU2Amn98OsTzjYmmhZZ0ly2/V1UYLSFo8p5ViUQAGMxkRG4KDo2AyZIdIra2nutFNXfTgOYkV/dl5rVphA9F+Lj4n/nDVuhRVRkSAV2DUMTg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726762543; c=relaxed/simple; bh=1j7mXy+VjT6eXBH5Kezle1ML4bvSgse2d8U5YyRws4g=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=oftxgFNMDnAlYcArg4MqWCEPxpfcme5OVg5Dg7Qw8yRMe7LU1+MImlWCXv/HsdWE7YzKoZJVKmkjO/YTDpajiaxBlXwJZasea6v0ywE2TmRxhjHAEkiBm8uWwJM3FkqfaJNze8lPg0QRFEQsurQgPhmA3G62higWn+zC2PaSKdU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=TQmcLZuB; arc=none smtp.client-ip=209.85.216.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TQmcLZuB" Received: by mail-pj1-f42.google.com with SMTP id 98e67ed59e1d1-2da55ea8163so750848a91.1; Thu, 19 Sep 2024 09:15:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1726762541; x=1727367341; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=bVPGrlqcNbfwdeIQjcgnYgToJlQTPpTEkX0MNkiBBL0=; b=TQmcLZuBteHtf1cFd5HntcTH1QL09+zSl/ByJhm5wR9BecCp0e7uonh6wubfG4YDjS w+0mQkjQLKgg6S3fIN713AK96WhQPbgVpQFXQWtsnd9QCQi3nJ9Jr2zcbtVQxVth3h80 CDY12dS+q87A2tnJLBPno+yWJq1CohlmdyqTtj4/3u4b+OatcpJidHj/uY590tQxz3KC BWkL3nv6/Uwh7fUljJQpn40Tr8JC93g7mM3wno4VZ/zWYUf5gu7dLcwrv8TxdBigM/Cp ioiUWPMshj/raZl7tubyYdGYzURyN3SagIRcox4sz2VMsg+DAzSePJEYK8a4ugx6Qh99 If5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726762541; x=1727367341; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=bVPGrlqcNbfwdeIQjcgnYgToJlQTPpTEkX0MNkiBBL0=; b=gFE2Ii4Qw8KZw3hAWZCwJImbTr2TNnbHe7qDPKUMyEeuqnPfSDUXRheGYCQBSB3HHv S+XbKYdBtlL8nZiDL2V6xZh6jxowYvkaakHEchZi/vFIfjcFFaYcQIsovLRlHajyMd53 H8RbkjBcmkLH15CKpKNydDq9dwsK+VaZ4eXyAbO0uOjQxtFd6Gw3eVNsH4FiNqa28vfu jNOPAFk9azF+cDQYZHfJIFWrutvLNbFLfYdu4vxMOWJqTb98Uov+dgnpblMPka+mABzz ZQteJ0msP1rMDSARFXO2zTxpkOhEKnRiCTXn2IeoQl7inRKFW3jnA1D2vj1DQe6gdIju OAeA== X-Forwarded-Encrypted: i=1; AJvYcCUogzRnNr3w9xeVKnN2xQ4kPOpwYQHmqjiRsdY24nt768WgPdDOo7JP+ihz10YpPF6+MZ8NJk076NvZpw==@vger.kernel.org, AJvYcCVuEI16mFn7QWB2lfEYVoO4bfLhoAf1LMrq1Dfo8ayxvYUz9N3Vv5k2l/xgo01enaOV4KXxpGOwuehMScggrfc=@vger.kernel.org, AJvYcCW2FpgvuuACsPeUfLrEEqhDbMULGn9LGxjmpUC1DWZyEOT3f5vCNE36LOWJ5GwycWicQMJj4PXC3mKM0gVW@vger.kernel.org, AJvYcCX9OWv5F/6ZQ+VsPUTaYWSazT1QmKzmqWIczDy4zGKnDpVVZ2k58nkVfVNJw1uZrMnuxgd5zhTJhc+k@vger.kernel.org X-Gm-Message-State: AOJu0YztD9x9ZzO4a8GBzklwgZnDgA+VyD1bq6lvvDCAhgfnP0qzOXpo WDPCJOD0fQkKxhl/WGAz9WmDfcoGnyJCZwEJCnp9yzL87lT8I46EZx6D6HVS X-Google-Smtp-Source: AGHT+IEGUIULoNej2TeXQSl+J47Ur3VN6tgVv5fubWThZrReX5rGCHdrbGM6uLr2ifuqkP6+B8ogzA== X-Received: by 2002:a17:90a:7d06:b0:2d3:c87e:b888 with SMTP id 98e67ed59e1d1-2dba0068293mr28328302a91.27.1726762540816; Thu, 19 Sep 2024 09:15:40 -0700 (PDT) Received: from localhost.localdomain ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 98e67ed59e1d1-2dd6eed1865sm2084674a91.34.2024.09.19.09.15.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Sep 2024 09:15:40 -0700 (PDT) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org Cc: konradybcio@kernel.org, ivo.ivanov.ivanov1@gmail.com, towinchenmi@gmail.com Subject: [PATCH v4 00/20] Initial device trees for A7-A11 based Apple devices Date: Fri, 20 Sep 2024 00:05:49 +0800 Message-ID: <20240919161443.10340-1-towinchenmi@gmail.com> X-Mailer: git-send-email 2.46.0 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi, This series adds device trees for all A7-A11 SoC based iPhones, iPads, iPod touches and Apple TVs. The following devices has been excluded from this series: - All T2 devices (A10-based): bootloader does not work (yet) - HomePod: Not tested, and it's also a different form factor To pass `make dtbs_check`, please install the latest dtschema from the main branch, for the `television` chassis type. This series supports the following on all devices: - SMP (spin-table) - UART - simple-framebuffer - watchdog - timer - pinctrl - AIC interrupts The following is supported on A7-A10: - Buttons and switches (with pinctrl) The buttons on A11 based devices like the iPhone X is a subdevice of the not yet supported SMC. Patch dependencies: - The required AIC patches[1] has been sitting in linux-next since next-20240906, through the tip tree. - The important serial fixes[2] has been sitting in linux-next since next-20240913, through the tty tree. - A trivial patch to increase the reset delay in the watchdog driver[3] are needed on some SoCs to avoid the "Reboot Failed" message. It has been reviewed. (The system will reset regardless of the patch) Authorship information: - The commits to actually add the dts files are mostly made by Konrad, and Konrad's sign-off is added by me with permission. I also updated the Konrad's email in the actual dts files. Konrad can confirm this. - Everything else is entirely made by me. Changes since v3: - Properly seperate A10X dt-binding additions and dts additions. - Apple CPU cores bindings, including the existing ones are now ordered alphabetically. Changes since v2: - Removed A10 cpufreq. The loader may be missing some initialization code that just happened to be performed by some versions of the firmware as well, given the inconsistent behavior on different devices. It is also possible that the driver needs to be modified, I do not know and this needs more research first. - Removed Ivaylo's tags on commit to add A8X device trees, seems he does not want those anymore[4]. - Added Ivaylo's tags on commit to add A8 device tree, I have missed the tag. See [5] for source of those tags. - Added Conor's missing A-b on the commit to add A7 machine bindings. Changes since v1: - Added /chassis-type property - Added opp-microvolt in A10 cpufreq for documentation purposes - Home button is now assigned KEY_HOMEPAGE - Fixed t8010-n112.dts and do not remove it from Makefile in later commits... (iPod touch 7) In order to be consistent with the Apple ARM Machines bindings, the order of dt-bindings did not change from v1. The sort order logic here is having SoC type families in release order, and SoCs within each family in release order: - t8xxx/t700x/s5l8960x (Apple HxxP/G series, "phone"/"tablet" chips) - s5l8960x (Apple H6/A7) - t7000 (Apple H7P/A8) - t7001 (Apple H7G/A8X) - s8000/3 (Apple H8P/A9) - s8001 (Apple H8G/A9X) - t8010 (Apple H9P/A10) - t8011 (Apple H9G/A10X) - t8015 (Apple H10/A11) - t8103 (Apple H13G/M1) - t8112 (Apple H14G/M2) - t6xxx (Apple HxxJ series, "desktop" chips) - t6000 (Apple H13J(S)/M1 Pro) - t6001 (Apple H13J(C)/M1 Max) - t6002 (Apple H13J(D)/M1 Ultra) At this moment, it is expected that most hardware blocks will be 100% compatible between A-series and AX-series SoCs, though to a less extent than compatibility between desktop chips of the same generation. v1: https://lore.kernel.org/asahi/20240911084353.28888-2-towinchenmi@gmail.com v2: https://lore.kernel.org/asahi/20240914052413.68177-1-towinchenmi@gmail.com v3: https://lore.kernel.org/asahi/20240915080733.3565-1-towinchenmi@gmail.com [1]: https://lore.kernel.org/asahi/20240901034143.12731-1-towinchenmi@gmail.com [2]: https://lore.kernel.org/asahi/20240911050741.14477-1-towinchenmi@gmail.com [3]: https://lore.kernel.org/asahi/20240913174540.45551-1-towinchenmi@gmail.com [4]: https://lore.kernel.org/asahi/34c748fe-89d2-d3a5-599d-52972c10f688@gmail.com [5]: https://github.com/konradybcio/linux-apple/commits/apple/v5.19-rc1 Nick Chan --- Konrad Dybcio (8): arm64: dts: apple: Add A7 devices arm64: dts: apple: Add A8 devices arm64: dts: apple: Add A8X devices arm64: dts: apple: Add A9 devices arm64: dts: apple: Add A9X devices arm64: dts: apple: Add A10 devices arm64: dts: apple: Add A10X devices arm64: dts: apple: Add A11 devices Nick Chan (12): dt-bindings: arm: cpus: Add Apple A7-A11 CPU cores dt-bindings: watchdog: apple,wdt: Add A7-A11 compatibles dt-bindings: pinctrl: apple,pinctrl: Add A7-A11 compatibles dt-bindings: arm: apple: Add A7 devices dt-bindings: arm: apple: Add A8 devices dt-bindings: arm: apple: Add A8X devices dt-bindings: arm: apple: Add A9 devices dt-bindings: arm: apple: Add A9X devices dt-bindings: arm: apple: Add A10 devices dt-bindings: arm: apple: Add A10X devices dt-bindings: arm: apple: Add A11 devices arm64: Kconfig: Update help text for CONFIG_ARCH_APPLE .../devicetree/bindings/arm/apple.yaml | 160 ++++++++++- .../devicetree/bindings/arm/cpus.yaml | 8 +- .../bindings/pinctrl/apple,pinctrl.yaml | 5 + .../bindings/watchdog/apple,wdt.yaml | 5 + arch/arm64/Kconfig.platforms | 4 +- arch/arm64/boot/dts/apple/Makefile | 53 ++++ arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi | 54 ++++ arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi | 54 ++++ arch/arm64/boot/dts/apple/s5l8960x-j71.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j72.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j73.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j85.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j85m.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j86.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j86m.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j87.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-j87m.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi | 54 ++++ arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi | 14 + arch/arm64/boot/dts/apple/s5l8960x-n51.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x-n53.dts | 14 + arch/arm64/boot/dts/apple/s5l8960x.dtsi | 146 ++++++++++ arch/arm64/boot/dts/apple/s8000-j71s.dts | 15 + arch/arm64/boot/dts/apple/s8000-j72s.dts | 15 + arch/arm64/boot/dts/apple/s8000-n66.dts | 15 + arch/arm64/boot/dts/apple/s8000-n69u.dts | 15 + arch/arm64/boot/dts/apple/s8000-n71.dts | 15 + arch/arm64/boot/dts/apple/s8000.dtsi | 178 ++++++++++++ arch/arm64/boot/dts/apple/s8001-j127.dts | 14 + arch/arm64/boot/dts/apple/s8001-j128.dts | 14 + arch/arm64/boot/dts/apple/s8001-j98a.dts | 14 + arch/arm64/boot/dts/apple/s8001-j99a.dts | 14 + arch/arm64/boot/dts/apple/s8001-pro.dtsi | 47 +++ arch/arm64/boot/dts/apple/s8001.dtsi | 167 +++++++++++ arch/arm64/boot/dts/apple/s8003-j71t.dts | 15 + arch/arm64/boot/dts/apple/s8003-j72t.dts | 15 + arch/arm64/boot/dts/apple/s8003-n66m.dts | 15 + arch/arm64/boot/dts/apple/s8003-n69.dts | 15 + arch/arm64/boot/dts/apple/s8003-n71m.dts | 15 + arch/arm64/boot/dts/apple/s8003.dtsi | 19 ++ arch/arm64/boot/dts/apple/s800x-6s.dtsi | 52 ++++ arch/arm64/boot/dts/apple/s800x-ipad5.dtsi | 46 +++ arch/arm64/boot/dts/apple/s800x-se.dtsi | 52 ++++ arch/arm64/boot/dts/apple/t7000-6.dtsi | 52 ++++ arch/arm64/boot/dts/apple/t7000-j42d.dts | 19 ++ arch/arm64/boot/dts/apple/t7000-j96.dts | 14 + arch/arm64/boot/dts/apple/t7000-j97.dts | 14 + arch/arm64/boot/dts/apple/t7000-mini4.dtsi | 53 ++++ arch/arm64/boot/dts/apple/t7000-n102.dts | 50 ++++ arch/arm64/boot/dts/apple/t7000-n56.dts | 14 + arch/arm64/boot/dts/apple/t7000-n61.dts | 14 + arch/arm64/boot/dts/apple/t7000.dtsi | 146 ++++++++++ arch/arm64/boot/dts/apple/t7001-air2.dtsi | 46 +++ arch/arm64/boot/dts/apple/t7001-j81.dts | 14 + arch/arm64/boot/dts/apple/t7001-j82.dts | 14 + arch/arm64/boot/dts/apple/t7001.dtsi | 154 ++++++++++ arch/arm64/boot/dts/apple/t8010-7.dtsi | 47 +++ arch/arm64/boot/dts/apple/t8010-d10.dts | 14 + arch/arm64/boot/dts/apple/t8010-d101.dts | 14 + arch/arm64/boot/dts/apple/t8010-d11.dts | 14 + arch/arm64/boot/dts/apple/t8010-d111.dts | 14 + arch/arm64/boot/dts/apple/t8010-ipad6.dtsi | 47 +++ arch/arm64/boot/dts/apple/t8010-ipad7.dtsi | 15 + arch/arm64/boot/dts/apple/t8010-j171.dts | 14 + arch/arm64/boot/dts/apple/t8010-j172.dts | 14 + arch/arm64/boot/dts/apple/t8010-j71b.dts | 14 + arch/arm64/boot/dts/apple/t8010-j72b.dts | 14 + arch/arm64/boot/dts/apple/t8010-n112.dts | 50 ++++ arch/arm64/boot/dts/apple/t8010.dtsi | 167 +++++++++++ arch/arm64/boot/dts/apple/t8011-j105a.dts | 15 + arch/arm64/boot/dts/apple/t8011-j120.dts | 14 + arch/arm64/boot/dts/apple/t8011-j121.dts | 14 + arch/arm64/boot/dts/apple/t8011-j207.dts | 14 + arch/arm64/boot/dts/apple/t8011-j208.dts | 14 + arch/arm64/boot/dts/apple/t8011-pro2.dtsi | 47 +++ arch/arm64/boot/dts/apple/t8011.dtsi | 175 ++++++++++++ arch/arm64/boot/dts/apple/t8015-8.dtsi | 16 ++ arch/arm64/boot/dts/apple/t8015-8plus.dtsi | 9 + arch/arm64/boot/dts/apple/t8015-d20.dts | 14 + arch/arm64/boot/dts/apple/t8015-d201.dts | 14 + arch/arm64/boot/dts/apple/t8015-d21.dts | 14 + arch/arm64/boot/dts/apple/t8015-d211.dts | 14 + arch/arm64/boot/dts/apple/t8015-d22.dts | 14 + arch/arm64/boot/dts/apple/t8015-d221.dts | 14 + arch/arm64/boot/dts/apple/t8015-x.dtsi | 16 ++ arch/arm64/boot/dts/apple/t8015.dtsi | 268 ++++++++++++++++++ 86 files changed, 3202 insertions(+), 4 deletions(-) create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j71.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j72.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j73.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j85.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j85m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j86.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j86m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j87.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-j87m.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-mini3.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-n51.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-n53.dts create mode 100644 arch/arm64/boot/dts/apple/s5l8960x.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8000-j71s.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-j72s.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n66.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n69u.dts create mode 100644 arch/arm64/boot/dts/apple/s8000-n71.dts create mode 100644 arch/arm64/boot/dts/apple/s8000.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001-j127.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j128.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j98a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-j99a.dts create mode 100644 arch/arm64/boot/dts/apple/s8001-pro.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8001.dtsi create mode 100644 arch/arm64/boot/dts/apple/s8003-j71t.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-j72t.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n66m.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n69.dts create mode 100644 arch/arm64/boot/dts/apple/s8003-n71m.dts create mode 100644 arch/arm64/boot/dts/apple/s8003.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-6s.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-ipad5.dtsi create mode 100644 arch/arm64/boot/dts/apple/s800x-se.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-6.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-j42d.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-j96.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-j97.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-mini4.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7000-n102.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-n56.dts create mode 100644 arch/arm64/boot/dts/apple/t7000-n61.dts create mode 100644 arch/arm64/boot/dts/apple/t7000.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7001-air2.dtsi create mode 100644 arch/arm64/boot/dts/apple/t7001-j81.dts create mode 100644 arch/arm64/boot/dts/apple/t7001-j82.dts create mode 100644 arch/arm64/boot/dts/apple/t7001.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-7.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-d10.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d101.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d11.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-d111.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-ipad6.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-ipad7.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8010-j171.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j172.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j71b.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-j72b.dts create mode 100644 arch/arm64/boot/dts/apple/t8010-n112.dts create mode 100644 arch/arm64/boot/dts/apple/t8010.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8011-j105a.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j120.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j121.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j207.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-j208.dts create mode 100644 arch/arm64/boot/dts/apple/t8011-pro2.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8011.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-8.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-8plus.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015-d20.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d201.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d21.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d211.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d22.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-d221.dts create mode 100644 arch/arm64/boot/dts/apple/t8015-x.dtsi create mode 100644 arch/arm64/boot/dts/apple/t8015.dtsi base-commit: 3621a2c9142bd490af0666c0c02d52d60ce0d2a5