| Message ID | 20240711193749.2397471-1-tmaimon77@gmail.com |
|---|---|
| Headers | show |
| Series | pinctrl: npcm8xx: pin configuration changes | expand |
On Thu, Jul 11, 2024 at 10:37:46PM +0300, Tomer Maimon wrote: > Remove unused smb4den pin, group and function on the Nuvoton NPCM8XX BMC > SoC. Does "unused" mean that they are just unused in current board designs, or does the hardware functionality actually not exist? Best regards, J > > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> > --- > drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > index f342aec3f6ca..396bd07e7c74 100644 > --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c > @@ -438,7 +438,6 @@ static const int smb4_pins[] = { 28, 29 }; > static const int smb4b_pins[] = { 18, 19 }; > static const int smb4c_pins[] = { 20, 21 }; > static const int smb4d_pins[] = { 22, 23 }; > -static const int smb4den_pins[] = { 17 }; > static const int smb5_pins[] = { 26, 27 }; > static const int smb5b_pins[] = { 13, 12 }; > static const int smb5c_pins[] = { 15, 14 }; > @@ -700,7 +699,6 @@ struct npcm8xx_pingroup { > NPCM8XX_GRP(smb4b), \ > NPCM8XX_GRP(smb4c), \ > NPCM8XX_GRP(smb4d), \ > - NPCM8XX_GRP(smb4den), \ > NPCM8XX_GRP(smb5), \ > NPCM8XX_GRP(smb5b), \ > NPCM8XX_GRP(smb5c), \ > @@ -949,7 +947,6 @@ NPCM8XX_SFUNC(smb4); > NPCM8XX_SFUNC(smb4b); > NPCM8XX_SFUNC(smb4c); > NPCM8XX_SFUNC(smb4d); > -NPCM8XX_SFUNC(smb4den); > NPCM8XX_SFUNC(smb5); > NPCM8XX_SFUNC(smb5b); > NPCM8XX_SFUNC(smb5c); > @@ -1173,7 +1170,6 @@ static struct npcm8xx_func npcm8xx_funcs[] = { > NPCM8XX_MKFUNC(smb4b), > NPCM8XX_MKFUNC(smb4c), > NPCM8XX_MKFUNC(smb4d), > - NPCM8XX_MKFUNC(smb4den), > NPCM8XX_MKFUNC(smb5), > NPCM8XX_MKFUNC(smb5b), > NPCM8XX_MKFUNC(smb5c), > @@ -1348,7 +1344,7 @@ static const struct npcm8xx_pincfg pincfg[] = { > NPCM8XX_PINCFG(14, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(15, gspi, MFSEL1, 24, smb5c, I2CSEGSEL, 20, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(16, lkgpo0, FLOCKR1, 0, smb7b, I2CSEGSEL, 27, tp_gpio2b, MFSEL7, 10, none, NONE, 0, none, NONE, 0, SLEW), > - NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, smb4den, I2CSEGSEL, 23, none, NONE, 0, none, NONE, 0, SLEW), > + NPCM8XX_PINCFG(17, pspi, MFSEL3, 13, cp1gpio5, MFSEL6, 7, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(18, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(19, pspi, MFSEL3, 13, smb4b, I2CSEGSEL, 14, none, NONE, 0, none, NONE, 0, none, NONE, 0, SLEW), > NPCM8XX_PINCFG(20, hgpio0, MFSEL2, 24, smb15, MFSEL3, 8, smb4c, I2CSEGSEL, 15, none, NONE, 0, none, NONE, 0, SLEW), > -- > 2.34.1 >
Hi, On Fri, 12 Jul 2024 at 02:48, Tomer Maimon <tmaimon77@gmail.com> wrote: > > This patch set addresses various pin configuration changes for the > Nuvoton NPCM8XX BMC SoC. The patches aim to enhance functionality, > remove unused pins, and improve overall pin management. > > Tomer Maimon (7): > pinctrl: nuvoton: npcm8xx: clear polarity before set both edge > pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 > pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group > pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function > pinctrl: nuvoton: npcm8xx: remove unused lpcclk pin, group, function > pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration > pinctrl: nuvoton: npcm8xx: modify pins flags You also need to update Documentation/devicetree/bindings/pinctrl/nuvoton,npcm845-pinctrl.yaml for any changes that affect the device tree bindings (e.g. adding/removing functions/groups). Best Regards, Jonas
Hi Jonas, Thanks for your comment, will be addressed in next version. Thanks, Tomer On Sat, 13 Jul 2024 at 15:35, Jonas Gorski <jonas.gorski@gmail.com> wrote: > > Hi, > > On Fri, 12 Jul 2024 at 02:48, Tomer Maimon <tmaimon77@gmail.com> wrote: > > > > This patch set addresses various pin configuration changes for the > > Nuvoton NPCM8XX BMC SoC. The patches aim to enhance functionality, > > remove unused pins, and improve overall pin management. > > > > Tomer Maimon (7): > > pinctrl: nuvoton: npcm8xx: clear polarity before set both edge > > pinctrl: nuvoton: npcm8xx: add gpi35 and gpi36 > > pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group > > pinctrl: nuvoton: npcm8xx: remove unused smb4den pin, group, function > > pinctrl: nuvoton: npcm8xx: remove unused lpcclk pin, group, function > > pinctrl: nuvoton: npcm8xx: modify clkrun and serirq pin configuration > > pinctrl: nuvoton: npcm8xx: modify pins flags > > You also need to update > Documentation/devicetree/bindings/pinctrl/nuvoton,npcm845-pinctrl.yaml > for any changes that affect the device tree bindings (e.g. > adding/removing functions/groups). > > Best Regards, > Jonas
On Tue, Jul 16, 2024 at 05:24:11PM +0300, Tomer Maimon wrote: > Hi, > > It does not exist, do you suggest modifying the "unused" to "not exist"? Yes, that would be clearer in my opinion. Best regards, Jonathan
Done in V2 :-) On Thu, 18 Jul 2024 at 23:58, J. Neuschäfer <j.neuschaefer@gmx.net> wrote: > > On Tue, Jul 16, 2024 at 05:24:11PM +0300, Tomer Maimon wrote: > > Hi, > > > > It does not exist, do you suggest modifying the "unused" to "not exist"? > > Yes, that would be clearer in my opinion. > > Best regards, > Jonathan