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The PFC block on RZ/V2H(P) is almost similar to one found on the RZ/G2L family with couple of differences. To able to re-use the use the existing driver for RZ/V2H(P) SoC function pointers are introduced based on the SoC changes. Sending this patch series as an RFC mainly as we are introducing a SoC specific 'renesas-rzv2h,output-impedance' property to configure the output impedance on the pins. Drive strength setting on RZ/V2H(P) depends on the different power rails which are coming out from the PMIC (connected via i2c). These power rails (required for drive strength) can be 1.2/1.8/3.3V. Pin are grouped into 4 groups, Group1: Impedance - 150/75/38/25 ohms (at 3.3 V) - 130/65/33/22 ohms (at 1.8 V) Group2: Impedance - 50/40/33/25 ohms (at 1.8 V) Group3: Impedance - 150/75/37.5/25 ohms (at 3.3 V) - 130/65/33/22 ohms (at 1.8 V) Group4: Impedance - 110/55/30/20 ohms (at 1.8 V) - 150/75/38/25 ohms (at 1.2 V) The existing property 'output-impedance-ohms' cannot be used to specify the output impedance setting on the pin mainly because, 1] The regulator information will not be available very earlier in boot process 2] The power rails info will be coming from the PMIC connected to I2C chip, as i2c will also require configuring the PFC there will be an interdependence of this two nodes. 3] We cannot use 'power-source' property for each pin as DTB's dont use up all the pins on SoC and when dumping the pinconf-pins from debugfs we wont be able to print the output-impedance of pins which are unused. Due to above cons 'renesas-rzv2h,output-impedance' property is introduced where it allows user to specify values [ x1 x2 x4 x6 ] which internally configures the IOLH bits to value [ 0 1 2 3 ] respectively, and does not depend on the actual voltage setting. Cheers, Prabhakar Lad Prabhakar (13): dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC pinctrl: renesas: pinctrl-rzg2l: Remove extra space in function parameter pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable configuration for all architectures pinctrl: renesas: pinctrl-rzg2l: Make cfg to u64 in struct rzg2l_variable_pin_cfg pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH pinctrl: renesas: pinctrl-rzg2l: Add function pointers for writing to PFC pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register pinctrl: renesas: pinctrl-rzg2l: Add function pointers for reading/writing OEN register pinctrl: renesas: pinctrl-rzg2l: Pass pincontrol device pointer to pinconf_generic_parse_dt_config() pinctrl: renesas: pinctrl-rzg2l: Add support to pass custom params pinctrl: renesas: pinctrl-rzg2l: Add support for RZ/V2H SoC .../pinctrl/renesas,rzg2l-pinctrl.yaml | 37 +- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 566 +++++++++++++++++- 2 files changed, 560 insertions(+), 43 deletions(-)