| Message ID | 20220929143225.17907-1-hal.feng@linux.starfivetech.com |
|---|---|
| Headers | show |
| Series | Basic StarFive JH7110 RISC-V SoC support | expand |
On Thu, Sep 29, 2022 at 18:59:24 +0100, Conor Dooley wrote: > On Thu, Sep 29, 2022 at 04:45:26PM +0200, Krzysztof Kozlowski wrote: > > On 29/09/2022 16:31, Hal Feng wrote: > > > > > This series is also available at > > > https://github.com/hal-feng/linux/commits/visionfive2-minimal > > > > > > [1] > > > https://www.cnx-software.com/2022/08/23/starfive-visionfive-2-quad-c > > > ore-risc-v-sbc-linux/ > > > [2] https://wiki.rvspace.org/ > > > > > > Emil Renner Berthing (17): > > > dt-bindings: riscv: Add StarFive JH7110 bindings > > > dt-bindings: timer: Add StarFive JH7110 clint > > > dt-bindings: interrupt-controller: Add StarFive JH7110 plic > > > dt-bindings: sifive-l2-cache: Support StarFive JH71x0 SoCs > > > soc: sifive: l2 cache: Convert to platform driver > > > soc: sifive: l2 cache: Add StarFive JH71x0 support > > > reset: starfive: jh7100: Use 32bit I/O on 32bit registers > > > dt-bindings: reset: Add StarFive JH7110 reset definitions > > > clk: starfive: Factor out common clock driver code > > > dt-bindings: clock: Add StarFive JH7110 system clock definitions > > > dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings > > > clk: starfive: Add StarFive JH7110 system clock driver > > > dt-bindings: clock: Add StarFive JH7110 always-on definitions > > > dt-bindings: clock: Add starfive,jh7110-clkgen-aon bindings > > > clk: starfive: Add StarFive JH7110 always-on clock driver > > > RISC-V: Add initial StarFive JH7110 device tree > > > RISC-V: Add StarFive JH7110 VisionFive2 board device tree > > > > Where is the rest of patches? Lists got only 5 of them. Anyway this is > > a bit too big patchset. Split per subsystem. > > They seem to be coming in over time in dribs and drabs. I assume it is not a > mailing list problem given how many lists are CCed on the mail and the fact > that they have different providers. > > For v2 (or multiple v2s) please fix up your process so that this gets sent > normally and not a couple of patches every hour. Our email server has technical issue and we are aware of this. Will fix in next revision. Sorry for the inconvenience caused. Best Regards, Hal
On Thu, 29 Sept 2022 at 16:34, Hal Feng <hal.feng@linux.starfivetech.com> wrote: > This series adds basic support for the StarFive JH7110 RISC-V SoC to > boot up and get a serial console. This series includes basic clock, > reset, pinctrl and uart drivers, which are necessary for booting. > It's should be noted that the reset and clock driver codes of JH7110 > are partly common with those of JH7100, so the common codes are > factored out and can be reused by drivers of JH7110 and other more > SoCs from StarFive. > > The JH7110 is the upgraded version of JH7100 and also the first official > released version of JH71XX series SoCs from StarFive Technology Ltd. > The VisionFive 2 boards equipped with JH7110 SoCs are launched > recently [1]. More information and support can visit RVspace wiki [2]. > > This series is also available at > https://github.com/hal-feng/linux/commits/visionfive2-minimal > > [1] https://www.cnx-software.com/2022/08/23/starfive-visionfive-2-quad-core-risc-v-sbc-linux/ > [2] https://wiki.rvspace.org/ Hi Hal, Firstly thanks for working on this! And sorry about the late reply. On the next version could you please cc emil.renner.berthing@canonical.com since it seems to handle the mailing list a bit better. I see you've changed the clock/reset and pinctrl quite a bit, so I'll comment on that separately. /Emil > Emil Renner Berthing (17): > dt-bindings: riscv: Add StarFive JH7110 bindings > dt-bindings: timer: Add StarFive JH7110 clint > dt-bindings: interrupt-controller: Add StarFive JH7110 plic > dt-bindings: sifive-l2-cache: Support StarFive JH71x0 SoCs > soc: sifive: l2 cache: Convert to platform driver > soc: sifive: l2 cache: Add StarFive JH71x0 support > reset: starfive: jh7100: Use 32bit I/O on 32bit registers > dt-bindings: reset: Add StarFive JH7110 reset definitions > clk: starfive: Factor out common clock driver code > dt-bindings: clock: Add StarFive JH7110 system clock definitions > dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings > clk: starfive: Add StarFive JH7110 system clock driver > dt-bindings: clock: Add StarFive JH7110 always-on definitions > dt-bindings: clock: Add starfive,jh7110-clkgen-aon bindings > clk: starfive: Add StarFive JH7110 always-on clock driver > RISC-V: Add initial StarFive JH7110 device tree > RISC-V: Add StarFive JH7110 VisionFive2 board device tree > > Hal Feng (8): > reset: starfive: jh7100: Use regmap APIs to operate registers > reset: starfive: jh7100: Move necessary properties to device tree > reset: starfive: Rename 'reset-starfive-jh7100.c' to > 'reset-starfive.c' > dt-bindings: reset: Add starfive,jh7110-reset bindings > reset: starfive: Add StarFive JH7110 SoC support > clk: starfive: Use regmap APIs to operate registers > RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW > RISC-V: Add StarFive JH7100 and JH7110 SoC Kconfig options > > Jianlong Huang (5): > pinctrl: Create subdirectory for StarFive drivers > pinctrl: starfive: Rename "pinctrl-starfive" to > "pinctrl-starfive-jh7100" > dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions > dt-bindings: pinctrl: Add StarFive JH7110 pinctrl bindings > pinctrl: starfive: Add StarFive JH7110 driver > > .../clock/starfive,jh7110-clkgen-aon.yaml | 62 ++ > .../clock/starfive,jh7110-clkgen-sys.yaml | 69 ++ > .../sifive,plic-1.0.0.yaml | 1 + > .../pinctrl/starfive,jh7100-pinctrl.yaml | 2 +- > .../pinctrl/starfive,jh7110-pinctrl.yaml | 202 ++++ > .../bindings/reset/starfive,jh7100-reset.yaml | 20 + > .../bindings/reset/starfive,jh7110-reset.yaml | 54 + > .../bindings/riscv/sifive-l2-cache.yaml | 4 + > .../devicetree/bindings/riscv/starfive.yaml | 3 + > .../bindings/timer/sifive,clint.yaml | 1 + > MAINTAINERS | 27 +- > arch/riscv/Kconfig.socs | 28 +- > arch/riscv/boot/dts/starfive/Makefile | 3 +- > .../dts/starfive/jh7100-beaglev-starlight.dts | 2 +- > arch/riscv/boot/dts/starfive/jh7100.dtsi | 3 + > .../jh7110-starfive-visionfive-v2.dts | 91 ++ > arch/riscv/boot/dts/starfive/jh7110.dtsi | 449 +++++++++ > arch/riscv/configs/defconfig | 1 + > drivers/clk/starfive/Kconfig | 29 +- > drivers/clk/starfive/Makefile | 6 +- > .../clk/starfive/clk-starfive-jh7100-audio.c | 138 +-- > drivers/clk/starfive/clk-starfive-jh7100.c | 836 +++++----------- > drivers/clk/starfive/clk-starfive-jh7100.h | 112 --- > .../clk/starfive/clk-starfive-jh7110-aon.c | 161 +++ > .../clk/starfive/clk-starfive-jh7110-sys.c | 648 ++++++++++++ > drivers/clk/starfive/clk-starfive.c | 349 +++++++ > drivers/clk/starfive/clk-starfive.h | 112 +++ > drivers/pinctrl/Kconfig | 18 +- > drivers/pinctrl/Makefile | 2 +- > drivers/pinctrl/starfive/Kconfig | 37 + > drivers/pinctrl/starfive/Makefile | 8 + > drivers/pinctrl/starfive/pinctrl-jh7110-aon.c | 718 ++++++++++++++ > drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 925 +++++++++++++++++ > .../pinctrl-starfive-jh7100.c} | 10 +- > drivers/pinctrl/starfive/pinctrl-starfive.c | 539 ++++++++++ > drivers/pinctrl/starfive/pinctrl-starfive.h | 131 +++ > drivers/reset/Kconfig | 7 +- > drivers/reset/Makefile | 2 +- > drivers/reset/reset-starfive-jh7100.c | 173 ---- > drivers/reset/reset-starfive.c | 218 ++++ > drivers/soc/Makefile | 2 +- > drivers/soc/sifive/Kconfig | 2 +- > drivers/soc/sifive/sifive_l2_cache.c | 86 +- > .../dt-bindings/clock/starfive-jh7110-aon.h | 26 + > .../dt-bindings/clock/starfive-jh7110-sys.h | 215 ++++ > ...l-starfive.h => pinctrl-starfive-jh7100.h} | 6 +- > .../pinctrl/pinctrl-starfive-jh7110.h | 931 ++++++++++++++++++ > include/dt-bindings/reset/starfive-jh7110.h | 154 +++ > 48 files changed, 6604 insertions(+), 1019 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-aon.yaml > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-sys.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh7110-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/reset/starfive,jh7110-reset.yaml > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts > create mode 100644 arch/riscv/boot/dts/starfive/jh7110.dtsi > delete mode 100644 drivers/clk/starfive/clk-starfive-jh7100.h > create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-aon.c > create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-sys.c > create mode 100644 drivers/clk/starfive/clk-starfive.c > create mode 100644 drivers/clk/starfive/clk-starfive.h > create mode 100644 drivers/pinctrl/starfive/Kconfig > create mode 100644 drivers/pinctrl/starfive/Makefile > create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-aon.c > create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-sys.c > rename drivers/pinctrl/{pinctrl-starfive.c => starfive/pinctrl-starfive-jh7100.c} (99%) > create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.c > create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.h > delete mode 100644 drivers/reset/reset-starfive-jh7100.c > create mode 100644 drivers/reset/reset-starfive.c > create mode 100644 include/dt-bindings/clock/starfive-jh7110-aon.h > create mode 100644 include/dt-bindings/clock/starfive-jh7110-sys.h > rename include/dt-bindings/pinctrl/{pinctrl-starfive.h => pinctrl-starfive-jh7100.h} (98%) > create mode 100644 include/dt-bindings/pinctrl/pinctrl-starfive-jh7110.h > create mode 100644 include/dt-bindings/reset/starfive-jh7110.h > > -- > 2.17.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Wed, 5 Oct 2022 15:05:45 +0200, Emil Renner Berthing wrote: > On Thu, 29 Sept 2022 at 16:34, Hal Feng <hal.feng@linux.starfivetech.com> wrote: > > This series adds basic support for the StarFive JH7110 RISC-V SoC to > > boot up and get a serial console. This series includes basic clock, > > reset, pinctrl and uart drivers, which are necessary for booting. > > It's should be noted that the reset and clock driver codes of JH7110 > > are partly common with those of JH7100, so the common codes are > > factored out and can be reused by drivers of JH7110 and other more > > SoCs from StarFive. > > > > The JH7110 is the upgraded version of JH7100 and also the first official > > released version of JH71XX series SoCs from StarFive Technology Ltd. > > The VisionFive 2 boards equipped with JH7110 SoCs are launched > > recently [1]. More information and support can visit RVspace wiki [2]. > > > > This series is also available at > > https://github.com/hal-feng/linux/commits/visionfive2-minimal > > > > [1] https://www.cnx-software.com/2022/08/23/starfive-visionfive-2-quad-core-risc-v-sbc-linux/ > > [2] https://wiki.rvspace.org/ > > Hi Hal, > > Firstly thanks for working on this! And sorry about the late reply. On > the next version could you please cc > emil.renner.berthing@canonical.com since it seems to handle the > mailing list a bit better. OK, I will cc to your new email instead on v2. Best Regards, Hal > I see you've changed the clock/reset and pinctrl quite a bit, so I'll > comment on that separatel
This series adds basic support for the StarFive JH7110 RISC-V SoC to boot up and get a serial console. This series includes basic clock, reset, pinctrl and uart drivers, which are necessary for booting. It's should be noted that the reset and clock driver codes of JH7110 are partly common with those of JH7100, so the common codes are factored out and can be reused by drivers of JH7110 and other more SoCs from StarFive. The JH7110 is the upgraded version of JH7100 and also the first official released version of JH71XX series SoCs from StarFive Technology Ltd. The VisionFive 2 boards equipped with JH7110 SoCs are launched recently [1]. More information and support can visit RVspace wiki [2]. This series is also available at https://github.com/hal-feng/linux/commits/visionfive2-minimal [1] https://www.cnx-software.com/2022/08/23/starfive-visionfive-2-quad-core-risc-v-sbc-linux/ [2] https://wiki.rvspace.org/ Emil Renner Berthing (17): dt-bindings: riscv: Add StarFive JH7110 bindings dt-bindings: timer: Add StarFive JH7110 clint dt-bindings: interrupt-controller: Add StarFive JH7110 plic dt-bindings: sifive-l2-cache: Support StarFive JH71x0 SoCs soc: sifive: l2 cache: Convert to platform driver soc: sifive: l2 cache: Add StarFive JH71x0 support reset: starfive: jh7100: Use 32bit I/O on 32bit registers dt-bindings: reset: Add StarFive JH7110 reset definitions clk: starfive: Factor out common clock driver code dt-bindings: clock: Add StarFive JH7110 system clock definitions dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings clk: starfive: Add StarFive JH7110 system clock driver dt-bindings: clock: Add StarFive JH7110 always-on definitions dt-bindings: clock: Add starfive,jh7110-clkgen-aon bindings clk: starfive: Add StarFive JH7110 always-on clock driver RISC-V: Add initial StarFive JH7110 device tree RISC-V: Add StarFive JH7110 VisionFive2 board device tree Hal Feng (8): reset: starfive: jh7100: Use regmap APIs to operate registers reset: starfive: jh7100: Move necessary properties to device tree reset: starfive: Rename 'reset-starfive-jh7100.c' to 'reset-starfive.c' dt-bindings: reset: Add starfive,jh7110-reset bindings reset: starfive: Add StarFive JH7110 SoC support clk: starfive: Use regmap APIs to operate registers RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW RISC-V: Add StarFive JH7100 and JH7110 SoC Kconfig options Jianlong Huang (5): pinctrl: Create subdirectory for StarFive drivers pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions dt-bindings: pinctrl: Add StarFive JH7110 pinctrl bindings pinctrl: starfive: Add StarFive JH7110 driver .../clock/starfive,jh7110-clkgen-aon.yaml | 62 ++ .../clock/starfive,jh7110-clkgen-sys.yaml | 69 ++ .../sifive,plic-1.0.0.yaml | 1 + .../pinctrl/starfive,jh7100-pinctrl.yaml | 2 +- .../pinctrl/starfive,jh7110-pinctrl.yaml | 202 ++++ .../bindings/reset/starfive,jh7100-reset.yaml | 20 + .../bindings/reset/starfive,jh7110-reset.yaml | 54 + .../bindings/riscv/sifive-l2-cache.yaml | 4 + .../devicetree/bindings/riscv/starfive.yaml | 3 + .../bindings/timer/sifive,clint.yaml | 1 + MAINTAINERS | 27 +- arch/riscv/Kconfig.socs | 28 +- arch/riscv/boot/dts/starfive/Makefile | 3 +- .../dts/starfive/jh7100-beaglev-starlight.dts | 2 +- arch/riscv/boot/dts/starfive/jh7100.dtsi | 3 + .../jh7110-starfive-visionfive-v2.dts | 91 ++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 449 +++++++++ arch/riscv/configs/defconfig | 1 + drivers/clk/starfive/Kconfig | 29 +- drivers/clk/starfive/Makefile | 6 +- .../clk/starfive/clk-starfive-jh7100-audio.c | 138 +-- drivers/clk/starfive/clk-starfive-jh7100.c | 836 +++++----------- drivers/clk/starfive/clk-starfive-jh7100.h | 112 --- .../clk/starfive/clk-starfive-jh7110-aon.c | 161 +++ .../clk/starfive/clk-starfive-jh7110-sys.c | 648 ++++++++++++ drivers/clk/starfive/clk-starfive.c | 349 +++++++ drivers/clk/starfive/clk-starfive.h | 112 +++ drivers/pinctrl/Kconfig | 18 +- drivers/pinctrl/Makefile | 2 +- drivers/pinctrl/starfive/Kconfig | 37 + drivers/pinctrl/starfive/Makefile | 8 + drivers/pinctrl/starfive/pinctrl-jh7110-aon.c | 718 ++++++++++++++ drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 925 +++++++++++++++++ .../pinctrl-starfive-jh7100.c} | 10 +- drivers/pinctrl/starfive/pinctrl-starfive.c | 539 ++++++++++ drivers/pinctrl/starfive/pinctrl-starfive.h | 131 +++ drivers/reset/Kconfig | 7 +- drivers/reset/Makefile | 2 +- drivers/reset/reset-starfive-jh7100.c | 173 ---- drivers/reset/reset-starfive.c | 218 ++++ drivers/soc/Makefile | 2 +- drivers/soc/sifive/Kconfig | 2 +- drivers/soc/sifive/sifive_l2_cache.c | 86 +- .../dt-bindings/clock/starfive-jh7110-aon.h | 26 + .../dt-bindings/clock/starfive-jh7110-sys.h | 215 ++++ ...l-starfive.h => pinctrl-starfive-jh7100.h} | 6 +- .../pinctrl/pinctrl-starfive-jh7110.h | 931 ++++++++++++++++++ include/dt-bindings/reset/starfive-jh7110.h | 154 +++ 48 files changed, 6604 insertions(+), 1019 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-aon.yaml create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-clkgen-sys.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh7110-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/reset/starfive,jh7110-reset.yaml create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts create mode 100644 arch/riscv/boot/dts/starfive/jh7110.dtsi delete mode 100644 drivers/clk/starfive/clk-starfive-jh7100.h create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-aon.c create mode 100644 drivers/clk/starfive/clk-starfive-jh7110-sys.c create mode 100644 drivers/clk/starfive/clk-starfive.c create mode 100644 drivers/clk/starfive/clk-starfive.h create mode 100644 drivers/pinctrl/starfive/Kconfig create mode 100644 drivers/pinctrl/starfive/Makefile create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-aon.c create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-sys.c rename drivers/pinctrl/{pinctrl-starfive.c => starfive/pinctrl-starfive-jh7100.c} (99%) create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.h delete mode 100644 drivers/reset/reset-starfive-jh7100.c create mode 100644 drivers/reset/reset-starfive.c create mode 100644 include/dt-bindings/clock/starfive-jh7110-aon.h create mode 100644 include/dt-bindings/clock/starfive-jh7110-sys.h rename include/dt-bindings/pinctrl/{pinctrl-starfive.h => pinctrl-starfive-jh7100.h} (98%) create mode 100644 include/dt-bindings/pinctrl/pinctrl-starfive-jh7110.h create mode 100644 include/dt-bindings/reset/starfive-jh7110.h