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[0/8] arm64: dts: qcom: Add SA8155p-adp board DTS

Message ID 20210607113840.15435-1-bhupesh.sharma@linaro.org
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Series arm64: dts: qcom: Add SA8155p-adp board DTS | expand

Message

Bhupesh Sharma June 7, 2021, 11:38 a.m. UTC
This series adds DTS for SA8155p-adp board which is based on
Qualcomm snapdragon sm8150 SoC. 

This patchset also includes DTS for the two new PMICs PMM8155AU_1
and PMM8155AU_2 found on the adp board.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: bhupesh.linux@gmail.com

Bhupesh Sharma (8):
  dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp
    board pmics
  dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for SA8155p-adp
  dt-bindings: arm: qcom: Add compatible for SA8155p-adp board
  regulator: qcom-rpmh: Add new regulator types found on SA8155p adp
    board
  pinctrl: qcom/pinctrl-spmi-gpio: Add compatibles for pmic-gpios on
    SA8155p-adp
  arm64: dts: qcom: pmm8155au_1: Add base dts file
  arm64: dts: qcom: pmm8155au_2: Add base dts file
  arm64: dts: qcom: sa8155p-adp: Add base dts file

 .../devicetree/bindings/arm/qcom.yaml         |   8 +
 .../bindings/pinctrl/qcom,pmic-gpio.txt       |   5 +
 .../regulator/qcom,rpmh-regulator.yaml        |   2 +
 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi     | 134 +++++++
 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi     | 107 +++++
 arch/arm64/boot/dts/qcom/sa8155p-adp.dts      | 375 ++++++++++++++++++
 drivers/pinctrl/qcom/pinctrl-spmi-gpio.c      |   4 +
 drivers/regulator/qcom-rpmh-regulator.c       |  72 ++++
 9 files changed, 708 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
 create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts

Comments

Bjorn Andersson June 11, 2021, 3 a.m. UTC | #1
On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:

> SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose

> the following PMIC GPIO blocks:

> 

> - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)

> - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)

> 

> Add support for the same in the pinctrl driver.

> 

> Cc: Linus Walleij <linus.walleij@linaro.org>

> Cc: Liam Girdwood <lgirdwood@gmail.com>

> Cc: Mark Brown <broonie@kernel.org>

> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>

> Cc: Vinod Koul <vkoul@kernel.org>

> Cc: Rob Herring <robh+dt@kernel.org>

> Cc: Andy Gross <agross@kernel.org>

> Cc: devicetree@vger.kernel.org

> Cc: linux-kernel@vger.kernel.org

> Cc: linux-gpio@vger.kernel.org

> Cc: bhupesh.linux@gmail.com

> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>

> ---

>  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++

>  1 file changed, 4 insertions(+)

> 

> diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c

> index 00870da0c94e..890c44b6e198 100644

> --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c

> +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c

> @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {

>  	{ .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },

>  	/* pm8150l has 12 GPIOs with holes on 7 */

>  	{ .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },

> +	/* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */

> +	{ .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },


As noted in the binding, I think this should be "qcom,pmm8155au-gpio"
and please skip the comment about the holes.

Thanks,
Bjorn

> +	/* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */

> +	{ .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },

>  	{ .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },

>  	{ .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },

>  	{ .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },

> -- 

> 2.31.1

>
Bhupesh Sharma June 14, 2021, 8:30 a.m. UTC | #2
Hi Bjorn,

On Fri, 11 Jun 2021 at 08:30, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
>
> On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
>
> > SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose
> > the following PMIC GPIO blocks:
> >
> > - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)
> > - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)
> >
> > Add support for the same in the pinctrl driver.
> >
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > Cc: Mark Brown <broonie@kernel.org>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Vinod Koul <vkoul@kernel.org>
> > Cc: Rob Herring <robh+dt@kernel.org>
> > Cc: Andy Gross <agross@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Cc: linux-gpio@vger.kernel.org
> > Cc: bhupesh.linux@gmail.com
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> >  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > index 00870da0c94e..890c44b6e198 100644
> > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {
> >       { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },
> >       /* pm8150l has 12 GPIOs with holes on 7 */
> >       { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },
> > +     /* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */
> > +     { .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },
>
> As noted in the binding, I think this should be "qcom,pmm8155au-gpio"
> and please skip the comment about the holes.

Similar to what I noted in the binding patch review thread, the pmic
gpio holes seem different as per the downstream dtsi.

So, please let me know and if required, I can make the suggested change in v2.

Thanks,
Bhupesh

> > +     /* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */
> > +     { .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },
> >       { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },
> >       { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },
> >       { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },
> > --
> > 2.31.1
> >
Bjorn Andersson June 14, 2021, 4:12 p.m. UTC | #3
On Mon 14 Jun 03:30 CDT 2021, Bhupesh Sharma wrote:

> Hi Bjorn,
> 
> On Fri, 11 Jun 2021 at 08:30, Bjorn Andersson
> <bjorn.andersson@linaro.org> wrote:
> >
> > On Mon 07 Jun 06:38 CDT 2021, Bhupesh Sharma wrote:
> >
> > > SA8155p-adp PMICs (PMM8155AU_1 and PMM8155AU_2) expose
> > > the following PMIC GPIO blocks:
> > >
> > > - PMM8155AU_1: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7 and gpio8)
> > > - PMM8155AU_2: gpio1-gpio10 (with holes on gpio2, gpio5, gpio7)
> > >
> > > Add support for the same in the pinctrl driver.
> > >
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Liam Girdwood <lgirdwood@gmail.com>
> > > Cc: Mark Brown <broonie@kernel.org>
> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > > Cc: Vinod Koul <vkoul@kernel.org>
> > > Cc: Rob Herring <robh+dt@kernel.org>
> > > Cc: Andy Gross <agross@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org
> > > Cc: linux-gpio@vger.kernel.org
> > > Cc: bhupesh.linux@gmail.com
> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > > ---
> > >  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > index 00870da0c94e..890c44b6e198 100644
> > > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > @@ -1127,6 +1127,10 @@ static const struct of_device_id pmic_gpio_of_match[] = {
> > >       { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 },
> > >       /* pm8150l has 12 GPIOs with holes on 7 */
> > >       { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 },
> > > +     /* pmm8155au-1 has 10 GPIOs with holes on 2, 5, 7 and 8 */
> > > +     { .compatible = "qcom,pmm8155au-1-gpio", .data = (void *) 10 },
> >
> > As noted in the binding, I think this should be "qcom,pmm8155au-gpio"
> > and please skip the comment about the holes.
> 
> Similar to what I noted in the binding patch review thread, the pmic
> gpio holes seem different as per the downstream dtsi.
> 
> So, please let me know and if required, I can make the suggested change in v2.
> 

As noted in the binding, this really seems like software configuration.
So we should deal with this in DT (e.g. by not referencing the gpios
that Linux shouldn't touch), rather than the driver.

Regards,
Bjorn

> Thanks,
> Bhupesh
> 
> > > +     /* pmm8155au-2 has 10 GPIOs with holes on 2, 5 and 7 */
> > > +     { .compatible = "qcom,pmm8155au-2-gpio", .data = (void *) 10 },
> > >       { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 },
> > >       { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 },
> > >       { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 },
> > > --
> > > 2.31.1
> > >