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Mon, 18 Jan 2021 21:27:45 -0800 Envelope-to: git@xilinx.com, michal.simek@xilinx.com, saikrishna12468@gmail.com, robh+dt@kernel.org, linus.walleij@linaro.org, gregkh@linuxfoundation.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Received: from [172.23.64.106] (port=37100 helo=xhdvnc125.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1l1jYO-0003Z5-Pf; Mon, 18 Jan 2021 21:27:45 -0800 Received: by xhdvnc125.xilinx.com (Postfix, from userid 14964) id E2FCC1222CE; Tue, 19 Jan 2021 10:57:43 +0530 (IST) From: Sai Krishna Potthuri To: Linus Walleij , Rob Herring , Michal Simek , "Greg Kroah-Hartman" CC: , , , , , , Sai Krishna Potthuri Subject: [PATCH v2 0/3] Added ZynqMP pinctrl driver Date: Tue, 19 Jan 2021 10:57:31 +0530 Message-ID: <1611034054-63867-1-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com> X-Mailer: git-send-email 2.1.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e09fbb85-8e1c-4d97-7287-08d8bc3af680 X-MS-TrafficTypeDiagnostic: CH2PR02MB6070: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:6430; 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DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jan 2021 05:27:50.1849 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e09fbb85-8e1c-4d97-7287-08d8bc3af680 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT005.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6070 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Added support for Xilinx ZynqMP pinctrl driver support and also updated the Xilinx firmware driver to support pinctrl functionality. This driver will query the pin information from the firmware and allow configuring the pins as per the request. changes in v2: - Use pattern for pin names in yaml file. - Updated to support multiple groups and pins. - Added type ref for the vendor specific properties. - Removed 'schmitt-cmos', instead used common properties. - Removed macros for drive-strength property. This might be resend for some people, as i had some trouble with my email server earlier. Sai Krishna Potthuri (3): firmware: xilinx: Added pinctrl support dt-bindings: pinctrl: Added binding for ZynqMP pinctrl driver pinctrl: Added Xilinx ZynqMP pinctrl driver support .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 337 ++++++ drivers/firmware/xilinx/zynqmp.c | 114 ++ drivers/pinctrl/Kconfig | 13 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-zynqmp.c | 1031 +++++++++++++++++ include/dt-bindings/pinctrl/pinctrl-zynqmp.h | 23 + include/linux/firmware/xlnx-zynqmp.h | 90 ++ 7 files changed, 1609 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml create mode 100644 drivers/pinctrl/pinctrl-zynqmp.c create mode 100644 include/dt-bindings/pinctrl/pinctrl-zynqmp.h