From patchwork Tue Feb 23 10:01:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 62684 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp1742461lbl; Tue, 23 Feb 2016 02:02:15 -0800 (PST) X-Received: by 10.66.249.70 with SMTP id ys6mr45242354pac.5.1456221733880; Tue, 23 Feb 2016 02:02:13 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id wk6si46210806pac.91.2016.02.23.02.02.13; Tue, 23 Feb 2016 02:02:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-fbdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-fbdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-fbdev-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751293AbcBWKCM (ORCPT + 2 others); Tue, 23 Feb 2016 05:02:12 -0500 Received: from mail-lb0-f171.google.com ([209.85.217.171]:32894 "EHLO mail-lb0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751221AbcBWKCL (ORCPT ); Tue, 23 Feb 2016 05:02:11 -0500 Received: by mail-lb0-f171.google.com with SMTP id x4so98599726lbm.0 for ; Tue, 23 Feb 2016 02:02:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zO6f3Y/NATr59/pOvHD6BcC4QFminP1hcxXYMvYW9x4=; b=Fw1buW/gO2dm+GEKKVdKIdADzJGT43Mwp7kQIGQiDeRauh6iwIdNg2wNCjhv8X9UOb FTZF00fw+WdElkgFFJHLM604BrGS63nnUSw+UW5xq92yKC/j+TLo14eCQP7mqgsgPoFx MpXT3KTGO2ifAc5nXPMOuCAorIRFqBDQyejV4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zO6f3Y/NATr59/pOvHD6BcC4QFminP1hcxXYMvYW9x4=; b=dPoiD75U02gCLjSJDoOXPQi8AVX8xvMczGeOZdcBZkHldRmjE6fxhguMeIoFHAe9MO Iu6pht/JRRp7saHfbflRmWRIwkkwb4fLskBI9sWUnOmcObLp/Fk2t9sOZ62HaspYXi9/ g5D+PsyGxSvIcqaMOKhv0ImiZRJf3Njy8rOjkV2yUZtp/v+xUqNzWIMTIMJ3RdXqbWIJ s+uj8fX9u0eRhhuEeywseiwZPze92nOLPcd2xC7OVfsYsdjeyIpDmVZERKw2kg9T8alq OsuA/zups84TSnt3VD+DpJCxiOcw33TXEPqJb13PW5FJZdIoFVWtOCpII4vAOZ1vPYpR IP+Q== X-Gm-Message-State: AG10YOSamdMSCjeTeF+1CStbuCFrWowuEAeVbrd9cd7sna56Oyp22GnLl3GguNBqK+zagXS5 X-Received: by 10.112.129.233 with SMTP id nz9mr11798653lbb.82.1456221729537; Tue, 23 Feb 2016 02:02:09 -0800 (PST) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k70sm3926525lfg.5.2016.02.23.02.02.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Feb 2016 02:02:08 -0800 (PST) From: Linus Walleij To: linux-fbdev@vger.kernel.org, Tomi Valkeinen , Jean-Christophe Plagniol-Villard , Pawel Moll , Rob Herring , Russell King Cc: linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ray Jui , Linus Walleij Subject: [PATCH 3/7 v2] video: ARM CLCD: support DT signal inversion flags Date: Tue, 23 Feb 2016 11:01:40 +0100 Message-Id: <1456221704-5792-4-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1456221704-5792-1-git-send-email-linus.walleij@linaro.org> References: <1456221704-5792-1-git-send-email-linus.walleij@linaro.org> Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org The device tree bindings from display-timing.txt allows us to specify if data enable, hsync, vsync or the pixed clock should be inverted on the way to the display. The driver does not currently handle this so add support for those flags as it is needed for the Versatile Sanyo LCD display. Note that the previous behaviour was to invert the pixel clock for all displays, so unless the pixel clock polarity is explicitly defined in the device tree (i.e. the timings node has the "pixelclk-active" property) we fall back to inverting the pixel clock. This needs some extra compatibility code. Since the timing flags have to be set up inside the struct clcd_panel, we need to refactor the code a bit to pass around the panel rather than just the mode. Cc: Pawel Moll Cc: Rob Herring Cc: Russell King Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes. Just reposting. --- drivers/video/fbdev/amba-clcd.c | 41 ++++++++++++++++++++++++++++++++++------- 1 file changed, 34 insertions(+), 7 deletions(-) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-fbdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c index c5d1e9ca81ab..8903a42c4122 100644 --- a/drivers/video/fbdev/amba-clcd.c +++ b/drivers/video/fbdev/amba-clcd.c @@ -567,10 +567,11 @@ static int clcdfb_register(struct clcd_fb *fb) #ifdef CONFIG_OF static int clcdfb_of_get_dpi_panel_mode(struct device_node *node, - struct fb_videomode *mode) + struct clcd_panel *clcd_panel) { int err; struct display_timing timing; + struct device_node *timnp; struct videomode video; err = of_get_display_timing(node, "panel-timing", &timing); @@ -579,10 +580,34 @@ static int clcdfb_of_get_dpi_panel_mode(struct device_node *node, videomode_from_timing(&timing, &video); - err = fb_videomode_from_videomode(&video, mode); + err = fb_videomode_from_videomode(&video, &clcd_panel->mode); if (err) return err; + /* Set up some inversion flags */ + timnp = of_get_child_by_name(node, "panel-timing"); + if (timnp && of_property_read_bool(timnp, "pixelclk-active")) { + if (timing.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) + clcd_panel->tim2 |= TIM2_IPC; + } else { + /* + * To preserve backwards compatibility, the IPC (inverted + * pixel clock) flag needs to be set on any display that + * doesn't explicitly specify that the pixel clock is + * active on the negative edge. + */ + clcd_panel->tim2 |= TIM2_IPC; + } + + if (timing.flags & DISPLAY_FLAGS_HSYNC_LOW) + clcd_panel->tim2 |= TIM2_IHS; + + if (timing.flags & DISPLAY_FLAGS_VSYNC_LOW) + clcd_panel->tim2 |= TIM2_IVS; + + if (timing.flags & DISPLAY_FLAGS_DE_LOW) + clcd_panel->tim2 |= TIM2_IOE; + return 0; } @@ -615,10 +640,11 @@ static int clcdfb_of_get_backlight(struct device_node *endpoint, } static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint, - struct fb_videomode *mode) + struct clcd_panel *clcd_panel) { int err; struct device_node *panel; + struct fb_videomode *mode; char *name; int len; @@ -628,11 +654,12 @@ static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint, /* Only directly connected DPI panels supported for now */ if (of_device_is_compatible(panel, "panel-dpi")) - err = clcdfb_of_get_dpi_panel_mode(panel, mode); + err = clcdfb_of_get_dpi_panel_mode(panel, clcd_panel); else err = -ENOENT; if (err) return err; + mode = &clcd_panel->mode; len = clcdfb_snprintf_mode(NULL, 0, mode); name = devm_kzalloc(dev, len + 1, GFP_KERNEL); @@ -663,8 +690,8 @@ static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0) }; int i; - /* Bypass pixel clock divider, data output on the falling edge */ - fb->panel->tim2 = TIM2_BCD | TIM2_IPC; + /* Bypass pixel clock divider */ + fb->panel->tim2 |= TIM2_BCD; /* TFT display, vert. comp. interrupt at the start of the back porch */ fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1); @@ -704,7 +731,7 @@ static int clcdfb_of_init_display(struct clcd_fb *fb) if (err) return err; - err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, &fb->panel->mode); + err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, fb->panel); if (err) return err;