From patchwork Thu May 8 11:00:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pawel Moll X-Patchwork-Id: 29826 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pa0-f71.google.com (mail-pa0-f71.google.com [209.85.220.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 016CC20534 for ; Thu, 8 May 2014 11:00:57 +0000 (UTC) Received: by mail-pa0-f71.google.com with SMTP id kx10sf10799247pab.2 for ; Thu, 08 May 2014 04:00:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:sender:precedence:list-id:x-original-sender :x-original-authentication-results:mailing-list:list-post:list-help :list-archive:list-unsubscribe; bh=P5k1JWK9t9kcRL/9H6fWDaD00AM5pqnXGbhNNe4Ic/c=; b=Ke3dOGRcdbPYKVfRHBfeItTxyxW1Lg+AKGMscL2Pmij4PL/WpntGDAKK9mBa9qQ59Y dKZsa9HOqbq64DIS3Fimv7ytEW2efnch81zAS2wNuXKPrEFYmepitYXTJ9+0bAr9K/cH CYpqAr+RJzB6sqir50DE7uii/ZOIn15IcXj5jaxuJdlbXQ3vKqS7j0quRLZGCuulENgm bmbKUlUJkj2B0XjPGN5zTT+FVkYeLYW9h/j9WTwIsVShQB6GrNncf2ACTc/V5Ah5obNP 4nJ5iikkGgj2MiuMefmVrhEjvz21nIZnLzR4HR5a4XTYj9jhhOXkHHozbRgq8wYvj0wS hQZA== X-Gm-Message-State: ALoCoQkp8Far3WL6D74MPHHYa1lmC1npVCTFCylWGB7srVWrQ6fLuswOiNhnpde8YrStMq8aMAKT X-Received: by 10.66.222.129 with SMTP id qm1mr1341866pac.6.1399546857199; Thu, 08 May 2014 04:00:57 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.51.132 with SMTP id u4ls3823469qga.36.gmail; Thu, 08 May 2014 04:00:57 -0700 (PDT) X-Received: by 10.220.162.196 with SMTP id w4mr129969vcx.58.1399546856762; Thu, 08 May 2014 04:00:56 -0700 (PDT) Received: from mail-ve0-f174.google.com (mail-ve0-f174.google.com [209.85.128.174]) by mx.google.com with ESMTPS id y10si111017vei.150.2014.05.08.04.00.56 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 08 May 2014 04:00:56 -0700 (PDT) Received-SPF: none (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) client-ip=209.85.128.174; Received: by mail-ve0-f174.google.com with SMTP id jw12so3024099veb.33 for ; Thu, 08 May 2014 04:00:56 -0700 (PDT) X-Received: by 10.52.130.225 with SMTP id oh1mr2013732vdb.8.1399546856650; Thu, 08 May 2014 04:00:56 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp387225vcb; Thu, 8 May 2014 04:00:56 -0700 (PDT) X-Received: by 10.66.254.3 with SMTP id ae3mr6367999pad.49.1399546855474; Thu, 08 May 2014 04:00:55 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ck1si337527pad.286.2014.05.08.04.00.55; Thu, 08 May 2014 04:00:55 -0700 (PDT) Received-SPF: none (google.com: linux-fbdev-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753123AbaEHLAy (ORCPT + 1 other); Thu, 8 May 2014 07:00:54 -0400 Received: from fw-tnat.austin.arm.com ([217.140.110.23]:24002 "EHLO collaborate-mta1.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752673AbaEHLAx (ORCPT ); Thu, 8 May 2014 07:00:53 -0400 Received: from hornet.Cambridge.Arm.com (hornet.cambridge.arm.com [10.2.201.45]) by collaborate-mta1.arm.com (Postfix) with ESMTP id 2CA1213F88D; Thu, 8 May 2014 06:00:41 -0500 (CDT) From: Pawel Moll To: Rob Herring , Mark Rutland , Ian Campbell , Kumar Gala , Jean-Christophe Plagniol-Villard , Tomi Valkeinen , Russell King Cc: linux-fbdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Pawel Moll Subject: [PATCH v6 1/2] video: ARM CLCD: Add DT support Date: Thu, 8 May 2014 12:00:29 +0100 Message-Id: <1399546830-2931-1-git-send-email-pawel.moll@arm.com> X-Mailer: git-send-email 1.9.1 Sender: linux-fbdev-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: pawel.moll@arm.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch adds basic DT bindings for the PL11x CLCD cells and make their fbdev driver use them. Signed-off-by: Pawel Moll --- Changes since v5: - realised that dma_alloc_writecombine() is a arm-specific function; replaced with generic dma_alloc_coherent()/dma_mmap_writecombine() Changes since v4: - simplified the pads description property and made it optional Changes since v3: - changed wording and order of interrupt-names and interrupts properties documentation - changed wording of arm,pl11x,framebuffer-base property documentation - cleaned up binding documentation indentation Changes since v2: - replaced video-ram phandle with arm,pl11x,framebuffer-base - replaced panel-* properties with arm,pl11x,panel-data-pads - replaced max-framebuffer-size with max-memory-bandwidth - modified clcdfb_of_init_tft_panel() to use the pads data and take differences between PL110 and PL110 into account Changes since v1: - minor code cleanups as suggested by Sylwester Nawrocki .../devicetree/bindings/video/arm,pl11x.txt | 83 ++++++++ drivers/video/fbdev/Kconfig | 2 + drivers/video/fbdev/amba-clcd.c | 219 +++++++++++++++++++++ 3 files changed, 304 insertions(+) create mode 100644 Documentation/devicetree/bindings/video/arm,pl11x.txt diff --git a/Documentation/devicetree/bindings/video/arm,pl11x.txt b/Documentation/devicetree/bindings/video/arm,pl11x.txt new file mode 100644 index 0000000..75da7b7 --- /dev/null +++ b/Documentation/devicetree/bindings/video/arm,pl11x.txt @@ -0,0 +1,83 @@ +* ARM PrimeCell Color LCD Controller PL110/PL111 + +See also Documentation/devicetree/bindings/arm/primecell.txt + +Required properties: + +- compatible: must be one of: + "arm,pl110", "arm,primecell" + "arm,pl111", "arm,primecell" + +- reg: base address and size of the control registers block + +- interrupt-names: either the single entry "combined" representing a + combined interrupt output (CLCDINTR), or the four entries + "mbe", "vcomp", "lnbu", "fuf" representing the individual + CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts + +- interrupts: contains an interrupt specifier for each entry in + interrupt-names + +- clocks-names: should contain "clcdclk" and "apb_pclk" + +- clocks: contains phandle and clock specifier pairs for the entries + in the clock-names property. See + Documentation/devicetree/binding/clock/clock-bindings.txt + +Optional properties: + +- arm,pl11x,framebuffer-base: a pair of two 32-bit values, address and size, + defining the framebuffer that must be used; if not present, the + framebuffer may be located anywhere in the memory + +- arm,pl11x,tft-r0g0b0-pads: when connected to a TFT panel, an array of three + 32-bit values, defining the way CLD pads are wired up; this implicitly + defines available color modes, for example: + - PL111 TFT 4:4:4 panel: + arm,pl11x,tft-r0g0b0-pads = <4 15 20>; + - PL110 TFT (1:)5:5:5 panel: + arm,pl11x,tft-r0g0b0-pads = <1 7 13>; + - PL111 TFT (1:)5:5:5 panel: + arm,pl11x,tft-r0g0b0-pads = <3 11 19>; + - PL111 TFT 5:6:5 panel: + arm,pl11x,tft-r0g0b0-pads = <3 10 19>; + - PL110 and PL111 TFT 8:8:8 panel: + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped: + arm,pl11x,tft-r0g0b0-pads = <16 8 0>; + +- max-memory-bandwidth: maximum bandwidth in bytes per second that the + cell's memory interface can handle + +- display-timings: standard display timings sub-node, defining possible + video modes of a connected panel; for details see + Documentation/devicetree/bindings/video/display-timing.txt + +Example: + + clcd@1f0000 { + compatible = "arm,pl111", "arm,primecell"; + reg = <0x1f0000 0x1000>; + interrupt-names = "combined"; + interrupts = <14>; + clock-names = "clcdclk", "apb_pclk"; + clocks = <&v2m_oscclk1>, <&smbclk>; + + arm,pl11x,framebuffer-base = <0x18000000 0x00800000>; + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + max-memory-bandwidth = <36864000>; /* bps, 640x480@60 16bpp */ + display-timings { + native-mode = <&v2m_clcd_timing0>; + v2m_clcd_timing0: vga { + clock-frequency = <25175000>; + hactive = <640>; + hback-porch = <40>; + hfront-porch = <24>; + hsync-len = <96>; + vactive = <480>; + vback-porch = <32>; + vfront-porch = <11>; + vsync-len = <2>; + }; + }; + }; diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index e1f4727..06045d8 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -280,6 +280,8 @@ config FB_ARMCLCD select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT + select FB_MODE_HELPERS if OF + select VIDEOMODE_HELPERS if OF help This framebuffer device driver is for the ARM PrimeCell PL110 Colour LCD controller. ARM PrimeCells provide the building diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c index 14d6b37..c1f2eaa 100644 --- a/drivers/video/fbdev/amba-clcd.c +++ b/drivers/video/fbdev/amba-clcd.c @@ -26,6 +26,11 @@ #include #include #include +#include +#include +#include +#include