From patchwork Fri Sep 6 08:22:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WangYuli X-Patchwork-Id: 826319 Received: from smtpbg150.qq.com (smtpbg150.qq.com [18.132.163.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 186B775809; Fri, 6 Sep 2024 08:23:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=18.132.163.193 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725611029; cv=none; b=ktmZJ2NYnbUJ0uG5+PN/KizCMRR+0IwrlFV2p3CxiSsfH5LXb8NR45VciaewbXmQCgTskJx8cW29C0yfTyXtk0OfNWutbdHKpf9lVoYfHUzgTfo/VNTcikEKJ/id4tx0/kftqyMdez94OekzMv+/TYbGdq4bBk2zEPjvHWWfyOk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725611029; c=relaxed/simple; bh=6KHu/M76euvmYB8uGMZQgD8G7vqWrP8kibHBRSdKCx0=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=eFA+V8T11FHqkq4/hi2MLdrpL7MXUHcV+dcDTQfxQYuEkOcR0HAHJW0it9irWFWsDYe3IXH1SEUupe0qiqbpgg8fJGUmWSKBvI6crm9Fl095gy0Emef4wphgthdWsy4tcXQXp/nDVFEgiAFfuUp+GAHFuIS8rPcRqYr8yf8mBrA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com; spf=pass smtp.mailfrom=uniontech.com; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b=NLVDOujL; arc=none smtp.client-ip=18.132.163.193 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=uniontech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=uniontech.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=uniontech.com header.i=@uniontech.com header.b="NLVDOujL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=uniontech.com; s=onoh2408; t=1725611002; bh=AThVTapdK8W6lR9Hzn1lU3iQE9P312HGd4jzTLay1S0=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=NLVDOujLFvZ6f/Cl65Roy7iLt/T1aXKv7Kle8HPjdTkcJDdgjJX3IUKPjyhW3rPJ/ +A+LnCYrgRexWeutiiHxVajkVgA7tKIOGiW1ZME7DCaMNqnkSyYVlHcWzCPmTG8gAN vi3te/+J5Qm4EkbqDY5y/2KnjfJ+qbpS79bRjOAU= X-QQ-mid: bizesmtp82t1725610983td3gjq13 X-QQ-Originating-IP: XS9dbmsREdHh9f9GsRKePQng3kgynBIBrvK4o5AKij8= Received: from localhost.localdomain ( [113.57.152.160]) by bizesmtp.qq.com (ESMTP) with id ; Fri, 06 Sep 2024 16:22:59 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 1 X-BIZMAIL-ID: 12750230750534342850 From: WangYuli To: stable@vger.kernel.org, gregkh@linuxfoundation.org, sashal@kernel.org, alexghiti@rivosinc.com, palmer@rivosinc.com, wangyuli@uniontech.com Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, anup@brainfault.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, rdunlap@infradead.org, dvlachos@ics.forth.gr, bhe@redhat.com, samuel.holland@sifive.com, guoren@kernel.org, linux@armlinux.org.uk, linux-arm-kernel@lists.infradead.org, willy@infradead.org, akpm@linux-foundation.org, fengwei.yin@intel.com, prabhakar.mahadev-lad.rj@bp.renesas.com, conor.dooley@microchip.com, glider@google.com, elver@google.com, dvyukov@google.com, kasan-dev@googlegroups.com, ardb@kernel.org, linux-efi@vger.kernel.org, atishp@atishpatra.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, qiaozhe@iscas.ac.cn, ryan.roberts@arm.com, ryabinin.a.a@gmail.com, andreyknvl@gmail.com, vincenzo.frascino@arm.com, namcao@linutronix.de Subject: [PATCH 6.6 1/4] riscv: Use WRITE_ONCE() when setting page table entries Date: Fri, 6 Sep 2024 16:22:36 +0800 Message-ID: <9606AC2974BEDC1A+20240906082254.435410-1-wangyuli@uniontech.com> X-Mailer: git-send-email 2.43.4 Precedence: bulk X-Mailing-List: linux-efi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:uniontech.com:qybglogicsvrgz:qybglogicsvrgz8a-1 From: Alexandre Ghiti [ Upstream commit c30fa83b49897e708a52e122dd10616a52a4c82b ] To avoid any compiler "weirdness" when accessing page table entries which are concurrently modified by the HW, let's use WRITE_ONCE() macro (commit 20a004e7b017 ("arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables") gives a great explanation with more details). Signed-off-by: Alexandre Ghiti Link: https://lore.kernel.org/r/20231213203001.179237-2-alexghiti@rivosinc.com Signed-off-by: Palmer Dabbelt Signed-off-by: WangYuli --- arch/riscv/include/asm/pgtable-64.h | 6 +++--- arch/riscv/include/asm/pgtable.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h index 7a5097202e15..a65a352dcfbf 100644 --- a/arch/riscv/include/asm/pgtable-64.h +++ b/arch/riscv/include/asm/pgtable-64.h @@ -198,7 +198,7 @@ static inline int pud_user(pud_t pud) static inline void set_pud(pud_t *pudp, pud_t pud) { - *pudp = pud; + WRITE_ONCE(*pudp, pud); } static inline void pud_clear(pud_t *pudp) @@ -274,7 +274,7 @@ static inline unsigned long _pmd_pfn(pmd_t pmd) static inline void set_p4d(p4d_t *p4dp, p4d_t p4d) { if (pgtable_l4_enabled) - *p4dp = p4d; + WRITE_ONCE(*p4dp, p4d); else set_pud((pud_t *)p4dp, (pud_t){ p4d_val(p4d) }); } @@ -347,7 +347,7 @@ static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) static inline void set_pgd(pgd_t *pgdp, pgd_t pgd) { if (pgtable_l5_enabled) - *pgdp = pgd; + WRITE_ONCE(*pgdp, pgd); else set_p4d((p4d_t *)pgdp, (p4d_t){ pgd_val(pgd) }); } diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 719c3041ae1c..f8e72df4113a 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -248,7 +248,7 @@ static inline int pmd_leaf(pmd_t pmd) static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) { - *pmdp = pmd; + WRITE_ONCE(*pmdp, pmd); } static inline void pmd_clear(pmd_t *pmdp) @@ -515,7 +515,7 @@ static inline int pte_same(pte_t pte_a, pte_t pte_b) */ static inline void set_pte(pte_t *ptep, pte_t pteval) { - *ptep = pteval; + WRITE_ONCE(*ptep, pteval); } void flush_icache_pte(pte_t pte);