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David Alan Gilbert" , , , , , Venu Busireddy , Brijesh Singh Subject: [PATCH v11 08/45] x86/sev: Detect/setup SEV/SME features earlier in boot Date: Thu, 24 Feb 2022 10:55:48 -0600 Message-ID: <20220224165625.2175020-9-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220224165625.2175020-1-brijesh.singh@amd.com> References: <20220224165625.2175020-1-brijesh.singh@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8683fcd9-b274-4606-6900-08d9f7b6d53b X-MS-TrafficTypeDiagnostic: SA0PR12MB4512:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: j3dpg9TwmV2vb3IHw+3AUjZfbn3VoRjUxM2eSP0MUcGsI6qawtzdVf31sZ6pgISmhaMWZerUMe5qvTkktklU1Iz1Bi2ZqTQ7C76lbNmNexvORGrMfXkLHpVzIOhE+vHoHbrt3M4OjcYD4hABEe6VN1+L3GjIE5j8R5QhX5D+vugWoJFnZDrlcaJKOER5kjFiWb9iN6jL1IvNho/FP31ydfZ1qEEFc+6cvmRdtrmTiuqjw9NKpt+caSW1D0ekGLZcokSdywzz/noc/zIrpNuNv//6qB2+w/vnNtn1FWDDbTZdT2PkaaL5RoZMBKY4bsaCldrIKo1Wl2X9vPq0Ksy6K6t+OcG5hsLiqwTgVauoopA+rQCjsEdVU7uGDGTWdq9L61CR6b3jxkqDRSUkPblmtqqg6+OL3JjXHQYm69HKpJcmlKlqOTxTiea4QfN8rciRViRy7VLFHlCZ05R9eza/T0JyHQb5ECFNGw0UtuiVXrrqd0e1vtKSiiUU5737yP8ZwfYZ2+hWssYc4AwztwDjhWzLVO4DIfvQs1B3m4BYIiHgH2NlZUF1jILPSwOsDpSABTpxs5JaE+82Mlhl2qT9y3bVoJqnzHT1x3sCkNQZWucQavrSd+vwCDK0X2SbttSVL+lzFCF/dP7zKIKRB4Pd2KG425ZKk4WUw+LbE+sECgLonnR6ot6zKJwMh37MvWNmxZQWc644vkSp1VrntuSLIozq1fe/AWfmImeRh+jGP28= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(36756003)(70206006)(186003)(83380400001)(16526019)(2616005)(1076003)(70586007)(336012)(426003)(47076005)(82310400004)(26005)(36860700001)(86362001)(8676002)(5660300002)(316002)(110136005)(508600001)(4326008)(2906002)(40460700003)(7696005)(6666004)(44832011)(8936002)(7416002)(7406005)(81166007)(54906003)(356005)(36900700001)(2101003); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Feb 2022 16:58:08.2091 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8683fcd9-b274-4606-6900-08d9f7b6d53b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT008.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4512 Precedence: bulk List-ID: X-Mailing-List: linux-efi@vger.kernel.org From: Michael Roth sme_enable() handles feature detection for both SEV and SME. Future patches will also use it for SEV-SNP feature detection/setup, which will need to be done immediately after the first #VC handler is set up. Move it now in preparation. Reviewed-by: Venu Busireddy Signed-off-by: Michael Roth Signed-off-by: Brijesh Singh --- arch/x86/kernel/head64.c | 3 --- arch/x86/kernel/head_64.S | 13 +++++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 4f5ecbbaae77..cbc285ddc4ac 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -192,9 +192,6 @@ unsigned long __head __startup_64(unsigned long physaddr, if (load_delta & ~PMD_PAGE_MASK) for (;;); - /* Activate Secure Memory Encryption (SME) if supported and enabled */ - sme_enable(bp); - /* Include the SME encryption mask in the fixup value */ load_delta += sme_get_me_mask(); diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 9c63fc5988cd..9c2c3aff5ee4 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -69,6 +69,19 @@ SYM_CODE_START_NOALIGN(startup_64) call startup_64_setup_env popq %rsi +#ifdef CONFIG_AMD_MEM_ENCRYPT + /* + * Activate SEV/SME memory encryption if supported/enabled. This needs to + * be done now, since this also includes setup of the SEV-SNP CPUID table, + * which needs to be done before any CPUID instructions are executed in + * subsequent code. + */ + movq %rsi, %rdi + pushq %rsi + call sme_enable + popq %rsi +#endif + /* Now switch to __KERNEL_CS so IRET works reliably */ pushq $__KERNEL_CS leaq .Lon_kernel_cs(%rip), %rax