From patchwork Thu Aug 12 11:24:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 496757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5534C19F39 for ; Thu, 12 Aug 2021 11:24:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 79FED6103E for ; Thu, 12 Aug 2021 11:24:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236840AbhHLLZD (ORCPT ); Thu, 12 Aug 2021 07:25:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236849AbhHLLY5 (ORCPT ); Thu, 12 Aug 2021 07:24:57 -0400 Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [IPv6:2a02:1800:120:4::f00:14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E265C06136A for ; Thu, 12 Aug 2021 04:24:27 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed20:438:1ff1:1071:f524]) by xavier.telenet-ops.be with bizsmtp id gbQS2500G1gJxCh01bQS3m; Thu, 12 Aug 2021 13:24:26 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1mE8oz-002FjL-Rk; Thu, 12 Aug 2021 13:24:25 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1mE8oy-007453-4W; Thu, 12 Aug 2021 13:24:24 +0200 From: Geert Uytterhoeven To: Magnus Damm , Rob Herring Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Laurent Pinchart Subject: [PATCH v2 21/29] arm64: dts: renesas: Add support for Salvator-XS with R-Car M3Ne-2G Date: Thu, 12 Aug 2021 13:24:11 +0200 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for the Renesas Salvator-X 2nd version development board equipped with an R-Car M3Ne-2G SiP. Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart --- v2: - Add Reviewed-by. --- arch/arm64/boot/dts/renesas/Makefile | 2 ++ .../boot/dts/renesas/r8a779m5-salvator-xs.dts | 36 +++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 2f82cb497ba66a86..5c47615525fc9203 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -83,4 +83,6 @@ dtb-$(CONFIG_ARCH_R8A77965) += r8a779m4-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a779m4-ulcb.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a779m4-ulcb-kf.dtb +dtb-$(CONFIG_ARCH_R8A77965) += r8a779m5-salvator-xs.dtb + dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts new file mode 100644 index 0000000000000000..c0341a88d641c837 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a779m5-salvator-xs.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: (GPL-2.0 or MIT) +/* + * Device Tree Source for the Salvator-X 2nd version board with R-Car M3Ne-2G + * + * Copyright (C) 2021 Glider bv + * + * Based on r8a77965-salvator-xs.dts + * Copyright (C) 2017 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a779m5.dtsi" +#include "salvator-xs.dtsi" + +/ { + model = "Renesas Salvator-X 2nd version board based on r8a779m5"; + compatible = "renesas,salvator-xs", "renesas,r8a779m5", + "renesas,r8a77965"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>, + <&versaclock6 1>, + <&x21_clk>, + <&versaclock6 2>; + clock-names = "du.0", "du.1", "du.3", + "dclkin.0", "dclkin.1", "dclkin.3"; +};