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[209.132.180.67]) by mx.google.com with ESMTP id c5si9264473pgq.434.2019.02.13.04.34.13; Wed, 13 Feb 2019 04:34:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YDWzlYBr; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389052AbfBMMeN (ORCPT + 7 others); Wed, 13 Feb 2019 07:34:13 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:32910 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2392136AbfBMMeM (ORCPT ); Wed, 13 Feb 2019 07:34:12 -0500 Received: by mail-pl1-f195.google.com with SMTP id y10so1112546plp.0 for ; Wed, 13 Feb 2019 04:34:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=5wfuddSW6tp5kYw+zApWLVum/WpZ+TiS9aNH3MKdYzo=; b=YDWzlYBrahihGwb5mYJoLKo/xZVNfbd33CPt1cbrzZWuoYd4mrO9sghY/jilXAFcPb b+yIqYLo+3iLfK4qo47FIeJm2alKAr0zD7IigOBYuDuxyVSpMP81wwKWqbTBYYM32ikY 7eP1H9UzdYWPJFg2EjQnEimpR2CCNOZFBn4j1318kKvcCLVBMmufv0TQAAgb3M4oLi1l 30XJVvAP2EU26QLC1+acFBj30jN9YNYmUNZ9h8iy2/P/sF5ZNAOJHkXaW5iopbmtTGVe 6FnpZ6gyNHgcI2r4cNt4APQ10EgSKsA5vc7FTpYqtJ3E7dF+lR4m5xxIEi9dEOxUb171 KI1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=5wfuddSW6tp5kYw+zApWLVum/WpZ+TiS9aNH3MKdYzo=; b=IFtjuFAczHs92+nC3XTSQyYj/dc9l/um3sFNcYBtaynin3o4tAJkcQN1InlLQnSkjU 5yGgvMWum7aeSCXD/zXG3Fl9qTCSE6qt345lcr7827RD0nZJbXeKJNFWESC4tvZj94YJ S85ohP6y5hhBptfCVMfjLAGqouZq68GHHCGvVTUGPkdt54uv4amU/0HGvFw5OSZlBWSd kpIMu3PvjK1cMFoyhVFBees2yxec/fcqi0kPm5iUGjsaN6HmJZZVPGZU7HZD8xF6Ei5/ d59Vr5xuYRwc9JezUMV0iNoGf2f/ZLoBCvRD8GO5dIHJmaE+IiR+SJqvKzYVsJ9RfLHp i5PQ== X-Gm-Message-State: AHQUAuZrUR1G7vbFuCbRtKuXkQYgP45kAoQhCDBHPX4FBok7o81HHdOp SPf1UlLIr4HhEvuTF3iP4Jup0g== X-Received: by 2002:a17:902:bd0b:: with SMTP id p11mr274548pls.259.1550061251528; Wed, 13 Feb 2019 04:34:11 -0800 (PST) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id l5sm21223640pgl.51.2019.02.13.04.34.07 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Feb 2019 04:34:10 -0800 (PST) From: Baolin Wang To: robh+dt@kernel.org, mark.rutland@arm.com, arnd@arndb.de Cc: olof@lixom.net, orsonzhai@gmail.com, zhang.lyra@gmail.com, devicetree@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, broonie@kernel.org, baolin.wang@linaro.org Subject: [PATCH v2 1/5] arm64: dts: sprd: Remove PMIC INTC irq trigger type Date: Wed, 13 Feb 2019 20:32:45 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Spreadtrum PMIC INTC controller has no registers to set trigger type, since it is always high level trigger as default. So remove its child devices' irq trigger type setting and change #interrupt-cells to 1. Signed-off-by: Baolin Wang --- arch/arm64/boot/dts/sprd/sc2731.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 1.7.9.5 diff --git a/arch/arm64/boot/dts/sprd/sc2731.dtsi b/arch/arm64/boot/dts/sprd/sc2731.dtsi index 82bd642..f2f2aa5 100644 --- a/arch/arm64/boot/dts/sprd/sc2731.dtsi +++ b/arch/arm64/boot/dts/sprd/sc2731.dtsi @@ -13,7 +13,7 @@ spi-max-frequency = <26000000>; interrupts = ; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <1>; #address-cells = <1>; #size-cells = <0>; @@ -43,14 +43,14 @@ compatible = "sprd,sc27xx-rtc", "sprd,sc2731-rtc"; reg = <0x280>; interrupt-parent = <&sc2731_pmic>; - interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <2>; }; pmic_eic: gpio@300 { compatible = "sprd,sc27xx-eic"; reg = <0x300>; interrupt-parent = <&sc2731_pmic>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -69,7 +69,7 @@ compatible = "sprd,sc27xx-adc", "sprd,sc2731-adc"; reg = <0x480>; interrupt-parent = <&sc2731_pmic>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; #io-channel-cells = <1>; hwlocks = <&hwlock 4>; };