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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id o11-20020a170906768b00b0077b523d309asm8357801ejm.185.2022.12.29.01.44.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Dec 2022 01:44:29 -0800 (PST) Message-ID: Date: Thu, 29 Dec 2022 10:44:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 1/2] dt-bindings: phy: rockchip: convert rockchip-dp-phy.txt to yaml To: heiko@sntech.de Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-phy@lists.infradead.org, vkoul@kernel.org, kishon@kernel.org Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert rockchip-dp-phy.txt to yaml. Changed: rename file name Signed-off-by: Johan Jonker --- Changed V2: Use the compatible as filename. --- .../bindings/phy/rockchip,rk3288-dp-phy.yaml | 41 +++++++++++++++++++ .../bindings/phy/rockchip-dp-phy.txt | 26 ------------ 2 files changed, 41 insertions(+), 26 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt -- 2.20.1 diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml new file mode 100644 index 000000000..2538235c5 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip specific extensions to the Analogix Display Port PHY + +maintainers: + - Heiko Stuebner + +properties: + compatible: + const: rockchip,rk3288-dp-phy + + clocks: + maxItems: 1 + + clock-names: + const: 24m + + "#phy-cells": + const: 0 + +required: + - compatible + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + edp-phy { + compatible = "rockchip,rk3288-dp-phy"; + clocks = <&cru SCLK_EDP_24M>; + clock-names = "24m"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt deleted file mode 100644 index e3b4809fb..000000000 --- a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt +++ /dev/null @@ -1,26 +0,0 @@ -Rockchip specific extensions to the Analogix Display Port PHY ------------------------------------- - -Required properties: -- compatible : should be one of the following supported values: - - "rockchip.rk3288-dp-phy" -- clocks: from common clock binding: handle to dp clock. - of memory mapped region. -- clock-names: from common clock binding: - Required elements: "24m" -- #phy-cells : from the generic PHY bindings, must be 0; - -Example: - -grf: syscon@ff770000 { - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; - -... - - edp_phy: edp-phy { - compatible = "rockchip,rk3288-dp-phy"; - clocks = <&cru SCLK_EDP_24M>; - clock-names = "24m"; - #phy-cells = <0>; - }; -};