From patchwork Thu Sep 9 08:49:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 508908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A106C4167B for ; Thu, 9 Sep 2021 08:50:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 069EF61167 for ; Thu, 9 Sep 2021 08:50:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232051AbhIIIvL (ORCPT ); Thu, 9 Sep 2021 04:51:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232096AbhIIIvG (ORCPT ); Thu, 9 Sep 2021 04:51:06 -0400 Received: from laurent.telenet-ops.be (laurent.telenet-ops.be [IPv6:2a02:1800:110:4::f00:19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AADFC0612E7 for ; Thu, 9 Sep 2021 01:49:56 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed20:7d44:646d:3ffb:9bbf]) by laurent.telenet-ops.be with bizsmtp id rkpr250073eH4vN01kprFC; Thu, 09 Sep 2021 10:49:54 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1mOFkk-003Cqr-De; Thu, 09 Sep 2021 10:49:50 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1mOFkj-00Aj5c-6c; Thu, 09 Sep 2021 10:49:49 +0200 From: Geert Uytterhoeven To: Magnus Damm Cc: Biju Das , Adam Ford , Florian Fainelli , Andrew Lunn , Heiner Kallweit , Russell King , Grygorii Strashko , linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 5/9] ARM: dts: renesas: Add compatible properties to RTL8201FL Ethernet PHYs Date: Thu, 9 Sep 2021 10:49:41 +0200 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add compatible values to Ethernet PHY subnodes representing Realtek RTL8201FL PHYs on RZ/A2 boards. This allows software to identify the PHY model at any time, regardless of the state of the PHY reset line. Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/r7s9210-rza2mevb.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/r7s9210-rza2mevb.dts b/arch/arm/boot/dts/r7s9210-rza2mevb.dts index ececb1bc995a5918..9c0d9686fe01133b 100644 --- a/arch/arm/boot/dts/r7s9210-rza2mevb.dts +++ b/arch/arm/boot/dts/r7s9210-rza2mevb.dts @@ -100,6 +100,8 @@ ðer1 { renesas,no-ether-link; phy-handle = <&phy1>; phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c816", + "ethernet-phy-ieee802.3-c22"; reg = <0>; }; };