From patchwork Sun Jun 11 00:32:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 691523 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CCC8C7EE29 for ; Sun, 11 Jun 2023 00:33:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229477AbjFKAdO (ORCPT ); Sat, 10 Jun 2023 20:33:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229450AbjFKAdN (ORCPT ); Sat, 10 Jun 2023 20:33:13 -0400 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A953EE1; Sat, 10 Jun 2023 17:33:12 -0700 (PDT) Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1q8913-0005BG-1W; Sun, 11 Jun 2023 00:33:09 +0000 Date: Sun, 11 Jun 2023 01:32:27 +0100 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Russell King , AngeloGioacchino Del Regno , Matthias Brugger , Lorenzo Bianconi , Mark Lee , Sean Wang , John Crispin , Felix Fietkau , Conor Dooley , Krzysztof Kozlowski , Rob Herring , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" , Sam Shih Subject: [PATCH net-next 1/8] dt-bindings: net: mediatek,net: add mt7988-eth binding Message-ID: MIME-Version: 1.0 Content-Disposition: inline Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Introduce DT bindings for the MT7988 SoC to mediatek,net.yaml. The MT7988 SoC got 3 Ethernet MACs operating at a maximum of 10 Gigabit/sec supported by 2 packet processor engines for offloading tasks. The first MAC is hard-wired to a built-in switch which exposes four 1000Base-T PHYs as user ports. It also comes with built-in 2500Base-T PHY which can be used with the 2nd GMAC. The 2nd and 3rd GMAC can be connected to external PHYs or provide SFP(+) cages attached via SGMII, 1000Base-X, 2500Base-X, USXGMII, 5GBase-KR or 10GBase-KR. Signed-off-by: Daniel Golle --- .../devicetree/bindings/net/mediatek,net.yaml | 111 ++++++++++++++++++ 1 file changed, 111 insertions(+) base-commit: e431e712c83676a8a9cd3988b323e3ef994a8ff3 diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml index acb2b2ac4fe1e..f08151a60084b 100644 --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -23,6 +23,7 @@ properties: - mediatek,mt7629-eth - mediatek,mt7981-eth - mediatek,mt7986-eth + - mediatek,mt7988-eth - ralink,rt5350-eth reg: @@ -70,6 +71,22 @@ properties: A list of phandle to the syscon node that handles the SGMII setup which is required for those SoCs equipped with SGMII. + mediatek,toprgu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the mediatek toprgu controller used to provide various clocks + and reset to the system. + + mediatek,usxgmiisys: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 2 + maxItems: 2 + items: + maxItems: 1 + description: + A list of phandle to the syscon node that handles the USXGMII setup which is required for + those SoCs equipped with USXGMII. + mediatek,wed: $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 2 @@ -84,6 +101,21 @@ properties: description: Phandle to the mediatek wed-pcie controller. + mediatek,xfi_pextp: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 2 + maxItems: 2 + items: + maxItems: 1 + description: + A list of phandle to the syscon node that handles the XFI setup which is required for + those SoCs equipped with XFI. + + mediatek,xfi_pll: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the XFI PLL unit. + dma-coherent: true mdio-bus: @@ -290,6 +322,85 @@ allOf: minItems: 2 maxItems: 2 + - if: + properties: + compatible: + contains: + const: mediatek,mt7988-eth + then: + properties: + interrupts: + minItems: 4 + + clocks: + minItems: 34 + maxItems: 34 + + clock-names: + items: + - const: crypto + - const: fe + - const: gp2 + - const: gp1 + - const: gp3 + - const: ethwarp_wocpu2 + - const: ethwarp_wocpu1 + - const: ethwarp_wocpu0 + - const: esw + - const: netsys0 + - const: netsys1 + - const: sgmii_tx250m + - const: sgmii_rx250m + - const: sgmii2_tx250m + - const: sgmii2_rx250m + - const: top_usxgmii0_sel + - const: top_usxgmii1_sel + - const: top_sgm0_sel + - const: top_sgm1_sel + - const: top_xfi_phy0_xtal_sel + - const: top_xfi_phy1_xtal_sel + - const: top_eth_gmii_sel + - const: top_eth_refck_50m_sel + - const: top_eth_sys_200m_sel + - const: top_eth_sys_sel + - const: top_eth_xgmii_sel + - const: top_eth_mii_sel + - const: top_netsys_sel + - const: top_netsys_500m_sel + - const: top_netsys_pao_2x_sel + - const: top_netsys_sync_250m_sel + - const: top_netsys_ppefb_250m_sel + - const: top_netsys_warp_sel + - const: wocpu1 + - const: wocpu0 + - const: xgp1 + - const: xgp2 + - const: xgp3 + + mediatek,sgmiisys: + minItems: 2 + maxItems: 2 + + mediatek,usxgmiisys: + minItems: 2 + maxItems: 2 + + mediatek,xfi_pextp: + minItems: 2 + maxItems: 2 + + mediatek,xfi_pll: + minItems: 1 + maxItems: 1 + + mediatek,infracfg: + minItems: 1 + maxItems: 1 + + mediatek,toprgu: + minItems: 1 + maxItems: 1 + patternProperties: "^mac@[0-1]$": type: object