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Wed, 31 May 2023 21:53:40 +0000 Message-ID: <755a14f1-92ad-ce4b-3fde-2a4b0650475c@axentia.se> Date: Wed, 31 May 2023 23:53:38 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Content-Language: sv-SE In-Reply-To: <1149c073-b761-8ad3-2930-3ef10ea7cf0b@axentia.se> To: Greg Kroah-Hartman Cc: LKML , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "devicetree@vger.kernel.org" From: Peter Rosin Subject: [PATCH 2/2] dt-bindings: ti-serdes-mux: Add defines for J784S4 SoC X-ClientProxiedBy: MM0P280CA0095.SWEP280.PROD.OUTLOOK.COM (2603:10a6:190:9::13) To AM0PR02MB4436.eurprd02.prod.outlook.com (2603:10a6:208:ed::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM0PR02MB4436:EE_|PAWPR02MB9854:EE_ X-MS-Office365-Filtering-Correlation-Id: 112ce558-7970-4361-67f6-08db62217e73 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: obJknQRBGHXSU6Ador+fQIisDxLRElUmVcnD5fDlN2jQbdLarvukraXFWOqrasAy6hsIw+ulFHOFFU1k7iLfJXT/urJJRoSQ7a7p0oWoPJQTZRr9Fhtimqym1ErParnhn2AmHp13nmqIZ9g5URSHvy9inMpdve8nKq9Hp1VAqQSX2iZ1AsBrGYLwiBqdMYHOWTJXMFCZofyow14S2z+AJAhfd/vmpEH8sPnb0owxbpdMmIhcRM1mzYp9k43Byv/phyg1FQjaE1USAeLUxYJ2HmK3xxFTMMJXZQGYASwzwf+ESaM7J/vfLuLi2zBUNgWbvv7mGGu8IVdtprgAcnncydlSXb0QHYbrLqLBSG5iH9Nbg7aFZJKZx5Bg6JyUfU12ncYp4BpLIwdBdXvy9lPIn0AjxPPfLguGV2bFbmcUF35RWiHxENbTGoOb86KQVgD8iEwATc/+r2OXMt5Gp6cE3Q5bj3qAwWPPGPcPqe2U2/DpvrWuOmvKkygQpr8SrXpX4ixL8LoiRNIfcBQGpmPtICYFuiUiLS2TK/maXq3c3NXt+JP8xSyONDT57/jENOtUO3p1UctlMfsqZSRJSRIqcVoNGW35SuinUyf+aGILTV6hkfxNuND2rV6C9Gr1Wdgpj5FV1jd02+QH7QgMKpJ2uA== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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Each SERDES lane mux can select up to 4 different IPs. Define all the possible functions. Signed-off-by: Matt Ranostay Acked-by: Krzysztof Kozlowski Signed-off-by: Siddharth Vadapalli Signed-off-by: Peter Rosin --- include/dt-bindings/mux/ti-serdes.h | 62 +++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h index d3116c52ab72..669ca2d6abce 100644 --- a/include/dt-bindings/mux/ti-serdes.h +++ b/include/dt-bindings/mux/ti-serdes.h @@ -117,4 +117,66 @@ #define J721S2_SERDES0_LANE3_USB 0x2 #define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3 +/* J784S4 */ + +#define J784S4_SERDES0_LANE0_IP1_UNUSED 0x0 +#define J784S4_SERDES0_LANE0_PCIE1_LANE0 0x1 +#define J784S4_SERDES0_LANE0_IP3_UNUSED 0x2 +#define J784S4_SERDES0_LANE0_IP4_UNUSED 0x3 + +#define J784S4_SERDES0_LANE1_IP1_UNUSED 0x0 +#define J784S4_SERDES0_LANE1_PCIE1_LANE1 0x1 +#define J784S4_SERDES0_LANE1_IP3_UNUSED 0x2 +#define J784S4_SERDES0_LANE1_IP4_UNUSED 0x3 + +#define J784S4_SERDES0_LANE2_PCIE3_LANE0 0x0 +#define J784S4_SERDES0_LANE2_PCIE1_LANE2 0x1 +#define J784S4_SERDES0_LANE2_IP3_UNUSED 0x2 +#define J784S4_SERDES0_LANE2_IP4_UNUSED 0x3 + +#define J784S4_SERDES0_LANE3_PCIE3_LANE1 0x0 +#define J784S4_SERDES0_LANE3_PCIE1_LANE3 0x1 +#define J784S4_SERDES0_LANE3_USB 0x2 +#define J784S4_SERDES0_LANE3_IP4_UNUSED 0x3 + +#define J784S4_SERDES1_LANE0_QSGMII_LANE3 0x0 +#define J784S4_SERDES1_LANE0_PCIE0_LANE0 0x1 +#define J784S4_SERDES1_LANE0_IP3_UNUSED 0x2 +#define J784S4_SERDES1_LANE0_IP4_UNUSED 0x3 + +#define J784S4_SERDES1_LANE1_QSGMII_LANE4 0x0 +#define J784S4_SERDES1_LANE1_PCIE0_LANE1 0x1 +#define J784S4_SERDES1_LANE1_IP3_UNUSED 0x2 +#define J784S4_SERDES1_LANE1_IP4_UNUSED 0x3 + +#define J784S4_SERDES1_LANE2_QSGMII_LANE1 0x0 +#define J784S4_SERDES1_LANE2_PCIE0_LANE2 0x1 +#define J784S4_SERDES1_LANE2_PCIE2_LANE0 0x2 +#define J784S4_SERDES1_LANE2_IP4_UNUSED 0x3 + +#define J784S4_SERDES1_LANE3_QSGMII_LANE2 0x0 +#define J784S4_SERDES1_LANE3_PCIE0_LANE3 0x1 +#define J784S4_SERDES1_LANE3_PCIE2_LANE1 0x2 +#define J784S4_SERDES1_LANE3_IP4_UNUSED 0x3 + +#define J784S4_SERDES2_LANE0_QSGMII_LANE5 0x0 +#define J784S4_SERDES2_LANE0_IP2_UNUSED 0x1 +#define J784S4_SERDES2_LANE0_IP3_UNUSED 0x2 +#define J784S4_SERDES2_LANE0_IP4_UNUSED 0x3 + +#define J784S4_SERDES2_LANE1_QSGMII_LANE6 0x0 +#define J784S4_SERDES2_LANE1_IP2_UNUSED 0x1 +#define J784S4_SERDES2_LANE1_IP3_UNUSED 0x2 +#define J784S4_SERDES2_LANE1_IP4_UNUSED 0x3 + +#define J784S4_SERDES2_LANE2_QSGMII_LANE7 0x0 +#define J784S4_SERDES2_LANE2_QSGMII_LANE1 0x1 +#define J784S4_SERDES2_LANE2_IP3_UNUSED 0x2 +#define J784S4_SERDES2_LANE2_IP4_UNUSED 0x3 + +#define J784S4_SERDES2_LANE3_QSGMII_LANE8 0x0 +#define J784S4_SERDES2_LANE3_QSGMII_LANE2 0x1 +#define J784S4_SERDES2_LANE3_IP3_UNUSED 0x2 +#define J784S4_SERDES2_LANE3_IP4_UNUSED 0x3 + #endif /* _DT_BINDINGS_MUX_TI_SERDES */