From patchwork Fri Jun 21 06:12:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 167360 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp312584ilk; Thu, 20 Jun 2019 23:12:59 -0700 (PDT) X-Google-Smtp-Source: APXvYqwo+G/GCIDEwdlM1X4e+7yd+7wg2RpdDLbDESiibAxvBa0K7+auE92ZocNBOrwByMF/XOe8 X-Received: by 2002:a17:902:8b82:: with SMTP id ay2mr29971022plb.164.1561097579483; Thu, 20 Jun 2019 23:12:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561097579; cv=none; d=google.com; s=arc-20160816; b=yTWP1/JLnbQ/0bDZouoXnBxa9wYtfMla/Ct0UO8ATSGK6MeUzYxnEUJv/HFzohvppc wCH4Z1+LXeWbI1gYqUFsJsmqKEVBaug57JUqbQ9hix/40Pwx1ON6t3PnlCVvPRLEfOPd u7VnHvKoC0vVqj8GImdpGE3Po/M01lSKmbKnBvoSXiyl4feMKGUhlMaEX/IjoISQNglQ NneIb/7JtONphjeW6Ycy8yFhvsBJJmoAUaUnVJrGdpxGJp4LCvnuxRCkgxejl1p8eWz8 CFAitMFJU3lbF0bSHQ4xC5eAeePnuMcNNMnYyjuhdYVDbSfcOnCAExJu9XSMx+HckGan 26oQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=sTCdN8+J6KLa7sEKH0EdC3HRf3eZR2ST2OSFrpSj98Q=; b=H6AwaUxBdD23uF+DzfXdjNqNEymZnzhpn0fgPTfVayftzrU7gQJmGJOGk8o/b+s1TC AKdDO8S4ddPMeNNpQRMmXNjxdaO5scp405pm9ZJB80MTLJieEuTxJspGvP5h9RJuuq09 ISg1dv+iT+WbCM+fUSgNm8BvdGqIDSr4fIBLBq+LNre3a9iXdaAJ+0IrgTKUEEzLUdZR VSIAhENqNCPatqqiViCLG/EXmfiD8couziJBaPpC3t4XrhHVBLXIF+zQ6hdiNb00Fo3J 0fTX0+ZXPv0BToKHOLE/QZPl1/WxlrjsNaBLD2Irnk8RqwoGy9NmYzcybzgyP7ZMuYEv 6MeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hRj5ECnn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g12si1839757pjs.35.2019.06.20.23.12.59; Thu, 20 Jun 2019 23:12:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hRj5ECnn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726309AbfFUGM6 (ORCPT + 8 others); Fri, 21 Jun 2019 02:12:58 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:32953 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726296AbfFUGM5 (ORCPT ); Fri, 21 Jun 2019 02:12:57 -0400 Received: by mail-pg1-f193.google.com with SMTP id m4so2228479pgk.0 for ; Thu, 20 Jun 2019 23:12:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=sTCdN8+J6KLa7sEKH0EdC3HRf3eZR2ST2OSFrpSj98Q=; b=hRj5ECnn+gxAxOedpghqwfXjTbai4FfzLUa9qcX00huzqhbDDBkKgalm3JGfPzF4sm 18yXQSv2ukoeVpjOkv7Db2DZDB28Ddz1Jkn3Q6od/ez8JwBgtOtfOj9X7ShDnaOcEZdA KM1UOo97Eo5hwjvpmIQCLUrL2E1wytzb1SD4kV+ffY2IRcgG4TT9FyI62cGLmutOceIj ipEH0GNu8YZ1aIGoR2Ku1j9iYaZQ84JO+TrBmMZYGD6Dx85JTEmWEO4lX7M6hvVTfA5N dvfPJJ8svG6P159BVUNq3Xzv6MU6BxsEK4BoUVBA9CNKMzhFQvWUVgCUhAsWngA5gedR Lbgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=sTCdN8+J6KLa7sEKH0EdC3HRf3eZR2ST2OSFrpSj98Q=; b=d1I6dD1ir5FkBbdIOHOOnSl8svUx7Uk/+vt+5nnyGISPMMxV8ODg+k2LctorWJhNh4 7ZFAqK/wWNRDP+rNe693apysEz9Gmi50ZT3gG2agC6Q4TRMLp+hzgZ4i0tdpGoLGtFgi fr/D020iWN57mAEpgAWG8tEF64Yqb0bCeVRdlfMY521qCmimS3M+KRjih1jUhD4uM1PY w7nFriNTYFBd1St6ZhKSEW0Q4VtsWFeQZK+kaNZEMmCJN+7E47r39eADdXLwoXbRTXFI d4ykY+kP97NIMVrLqc2i4435XXlTVJi2HCC7jAoUWSNF9GRsWPnKjrv+9bdC6rNp0V10 TpDA== X-Gm-Message-State: APjAAAX7Hl+64H1eF9Ojx4i65q6t/fUXGbhHj4QWHA0uVAcz6uuM+Zhq F0u9Mqu1oxRzGEjEcN1pkhGc7g== X-Received: by 2002:a17:90a:d814:: with SMTP id a20mr4358452pjv.48.1561097576891; Thu, 20 Jun 2019 23:12:56 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id x7sm1266134pfm.82.2019.06.20.23.12.53 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Jun 2019 23:12:56 -0700 (PDT) From: Baolin Wang To: adrian.hunter@intel.com, ulf.hansson@linaro.org, zhang.lyra@gmail.com, orsonzhai@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: baolin.wang@linaro.org, vincent.guittot@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: mmc: sprd: Add pinctrl support Date: Fri, 21 Jun 2019 14:12:32 +0800 Message-Id: <73f6c1291e4c15da6be53a6dd4602622e142fefb.1561094029.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When changing SD card voltage signal for Spreadtrum SD host controller, it also need to switch related pin's state. Thus add pinctrl properties' description in documentation. Signed-off-by: Baolin Wang --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 7 +++++++ 1 file changed, 7 insertions(+) -- 1.7.9.5 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt index e675397..eb7eb1b 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -19,6 +19,9 @@ Required properties: Optional properties: - assigned-clocks: the same with "sdio" clock - assigned-clock-parents: the default parent of "sdio" clock +- pinctrl-names: should be "default", "state_uhs" +- pinctrl-0: should contain default/high speed pin control +- pinctrl-1: should contain uhs mode pin control PHY DLL delays are used to delay the data valid window, and align the window to sampling clock. PHY DLL delays can be configured by following properties, @@ -50,6 +53,10 @@ sdio0: sdio@20600000 { assigned-clocks = <&ap_clk CLK_EMMC_2X>; assigned-clock-parents = <&rpll CLK_RPLL_390M>; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&sd0_pins_default>; + pinctrl-1 = <&sd0_pins_uhs>; + sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>; bus-width = <8>; non-removable;