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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id w26-20020a056402129a00b0046dd0c2a08esm7351683edv.36.2022.12.21.10.27.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Dec 2022 10:27:32 -0800 (PST) Message-ID: <621bc5c4-340e-683d-fa61-520b9ed45e1e@gmail.com> Date: Wed, 21 Dec 2022 19:27:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v5 12/12] arm64: dts: rockchip: rk356x: remove hclk from dsi node To: heiko@sntech.de Cc: hjc@rock-chips.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, gregkh@linuxfoundation.org, airlied@gmail.com, daniel@ffwll.ch, andrzej.hajda@intel.com, neil.armstrong@linaro.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, philippe.cornu@foss.st.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-usb@vger.kernel.org References: <7f883643-c796-029f-ba38-73532325632d@gmail.com> Content-Language: en-US In-Reply-To: <7f883643-c796-029f-ba38-73532325632d@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The hclk is not used in the dw-mipi-dsi-rockchip.c driver, so remove hclk from the rk356x.dtsi dsi node. Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.20.1 diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 5706c3e24..2cb61a783 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -743,8 +743,8 @@ compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi"; reg = <0x00 0xfe060000 0x00 0x10000>; interrupts = ; - clock-names = "pclk", "hclk"; - clocks = <&cru PCLK_DSITX_0>, <&cru HCLK_VO>; + clock-names = "pclk"; + clocks = <&cru PCLK_DSITX_0>; phy-names = "dphy"; phys = <&dsi_dphy0>; power-domains = <&power RK3568_PD_VO>; @@ -771,8 +771,8 @@ compatible = "rockchip,rk3568-mipi-dsi", "snps,dw-mipi-dsi"; reg = <0x0 0xfe070000 0x0 0x10000>; interrupts = ; - clock-names = "pclk", "hclk"; - clocks = <&cru PCLK_DSITX_1>, <&cru HCLK_VO>; + clock-names = "pclk"; + clocks = <&cru PCLK_DSITX_1>; phy-names = "dphy"; phys = <&dsi_dphy1>; power-domains = <&power RK3568_PD_VO>;