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[209.132.180.67]) by mx.google.com with ESMTP id 16si9437714pfh.244.2019.05.17.13.19.45; Fri, 17 May 2019 13:19:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernelci-org.20150623.gappssmtp.com header.s=20150623 header.b=rtMZPuBQ; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727792AbfEQUTp (ORCPT + 7 others); Fri, 17 May 2019 16:19:45 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:45720 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727590AbfEQUTp (ORCPT ); Fri, 17 May 2019 16:19:45 -0400 Received: by mail-wr1-f67.google.com with SMTP id b18so8327491wrq.12 for ; Fri, 17 May 2019 13:19:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernelci-org.20150623.gappssmtp.com; s=20150623; h=message-id:date:mime-version:content-transfer-encoding:subject:to :from:cc; bh=djr/WXBRd+de1RQsSnwTqjcAKvd/O5mg6l1k6CM1beM=; b=rtMZPuBQvMBed2NCiJd0SHx9iaYiKFrVe/wUeUm5M4lQwUXyGNcUhnPpyRHOCz74Vv F9FODgdaQXiqY2POtpk7X0/HUaRTDhL1FI+cxZVel9IWrW9F38ccLZbUMYpQgkEedGRA hbj44T5trbEmUh2+hoFWj8RF+yDbogVNg+mS58vL6joWcho3MtRCdUKxVDI+lIyC2HjC iPKWz6Gvju7MRlbbwqPA0weRAa2Wu90lLhxjaSjYFumPAgJX2H3M0I+whJJ7M//h/lD3 Hv8GvVjbOOcLN0eIHbAsdbA+ssvFqRcPNzgm9vnRGYQV9pv0Pf0F117O4buo2+PXocGs BNrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:message-id:date:mime-version :content-transfer-encoding:subject:to:from:cc; bh=djr/WXBRd+de1RQsSnwTqjcAKvd/O5mg6l1k6CM1beM=; b=OO1QeUCzRxvQE9sDbGJvMlO6ejvY1g0zB+0Yp+qh5J1LaMcBLabLzqIwxVwI0OfifC GOIDkd/JZN8UTZi2657h5hlEh6nH987Lb/N0WeaDRl0rVi2WNwfTylYtCfpb9Nlu7qke mHi5eJ1aVctLFkck7+wOd3GEdxrTMTb2j272zAF6RuVUNvlB/3CHbLd14Bi1WerwNEGy lqPsEvUlr8OxzDAvfA3+Xw9U8Cvzt+fiN25VoTAjd1uSJxnhq+qlAtiM3MblvxTemDU+ mmCvUvq8LCnK8bIc7GX5kGNuN8t3sV/ak3eRIZxoilcP0HqGK8BJpjRAuOI2CtGCo1nZ HsDA== X-Gm-Message-State: APjAAAVM/aCsfk2Ds0N4WCZPVShnnJiP3PFMN2gVYcfMoaZox+n6GIYp vxA3OhNEFTPyx5OvgYJWmmiy5A== X-Received: by 2002:adf:f6c8:: with SMTP id y8mr24018465wrp.175.1558124382869; Fri, 17 May 2019 13:19:42 -0700 (PDT) Received: from [148.251.42.114] ([2a01:4f8:201:9271::2]) by smtp.gmail.com with ESMTPSA id u15sm1402035wru.16.2019.05.17.13.19.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 May 2019 13:19:42 -0700 (PDT) Message-ID: <5cdf175e.1c69fb81.9d43b.8249@mx.google.com> Date: Fri, 17 May 2019 13:19:42 -0700 (PDT) MIME-Version: 1.0 X-Kernelci-Report-Type: bisect X-Kernelci-Tree: mainline X-Kernelci-Lab-Name: lab-baylibre X-Kernelci-Branch: master X-Kernelci-Kernel: v5.1-12172-g2c45e7fbc962 Subject: mainline/master boot bisection: v5.1-12172-g2c45e7fbc962 on meson-g12a-x96-max To: tomeu.vizoso@collabora.com, guillaume.tucker@collabora.com, mgalka@collabora.com, Kevin Hilman , Neil Armstrong , broonie@kernel.org, matthew.hart@linaro.org, khilman@baylibre.com, enric.balletbo@collabora.com, Jerome Brunet From: "kernelci.org bot" Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-amlogic@lists.infradead.org, Mark Rutland , linux-arm-kernel@lists.infradead.org Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * This automated bisection report was sent to you on the basis * * that you may be involved with the breaking commit it has * * found. No manual investigation has been done to verify it, * * and the root cause of the problem may be somewhere else. * * Hope this helps! * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * mainline/master boot bisection: v5.1-12172-g2c45e7fbc962 on meson-g12a-x96-max Summary: Start: 2c45e7fbc962 Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux Details: https://kernelci.org/boot/id/5cde4f3459b5143cfb7a3628 Plain log: https://storage.kernelci.org//mainline/master/v5.1-12172-g2c45e7fbc962/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-8/lab-baylibre/boot-meson-g12a-x96-max.txt HTML log: https://storage.kernelci.org//mainline/master/v5.1-12172-g2c45e7fbc962/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-8/lab-baylibre/boot-meson-g12a-x96-max.html Result: 11a7bea17c9e arm64: dts: meson: g12a: add pinctrl support controllers Checks: revert: PASS verify: PASS Parameters: Tree: mainline URL: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git Branch: master Target: meson-g12a-x96-max CPU arch: arm64 Lab: lab-baylibre Compiler: gcc-8 Config: defconfig+CONFIG_RANDOMIZE_BASE=y Test suite: boot Breaking commit found: ------------------------------------------------------------------------------- commit 11a7bea17c9e0a36daab934d83e15a760f402147 Author: Jerome Brunet Date: Mon Mar 18 10:58:45 2019 +0100 arm64: dts: meson: g12a: add pinctrl support controllers Add the peripheral and always-on pinctrl controllers to the g12a soc. Signed-off-by: Jerome Brunet Signed-off-by: Neil Armstrong Signed-off-by: Kevin Hilman ------------------------------------------------------------------------------- Git bisection log: ------------------------------------------------------------------------------- git bisect start # good: [a455eda33faafcaac1effb31d682765b14ef868c] Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal git bisect good a455eda33faafcaac1effb31d682765b14ef868c # bad: [2c45e7fbc962be1b03f2c2af817a76f5ba810af2] Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux git bisect bad 2c45e7fbc962be1b03f2c2af817a76f5ba810af2 # bad: [be058ba65d9e43f40d31d9b16b99627f0a20de1b] Merge tag 'imx-dt-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt git bisect bad be058ba65d9e43f40d31d9b16b99627f0a20de1b # bad: [7996313656b83ba516a1546d51f08f1a0fab4e06] Merge tag 'omap-for-v5.2/dt-am3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt git bisect bad 7996313656b83ba516a1546d51f08f1a0fab4e06 # bad: [2140eaf2f46faf2627ec030d7cabf2dda2cb546b] Merge tag 'stm32-dt-for-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt git bisect bad 2140eaf2f46faf2627ec030d7cabf2dda2cb546b # bad: [1a88083b9349b8310b25d9a9a96802ee4447e6b9] Merge tag 'v5.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt git bisect bad 1a88083b9349b8310b25d9a9a96802ee4447e6b9 # bad: [1c93235a6d92deaab38bbb1cfc764b0757331ebb] Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt git bisect bad 1c93235a6d92deaab38bbb1cfc764b0757331ebb # bad: [ff4f8b6cab5885ebc2c6b21fd058db8544e2eebb] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins git bisect bad ff4f8b6cab5885ebc2c6b21fd058db8544e2eebb # good: [965c827ac37e71f76d3ac55c75ac08909f2a4eed] arm64: dts: meson: g12a: add efuse git bisect good 965c827ac37e71f76d3ac55c75ac08909f2a4eed # bad: [11a7bea17c9e0a36daab934d83e15a760f402147] arm64: dts: meson: g12a: add pinctrl support controllers git bisect bad 11a7bea17c9e0a36daab934d83e15a760f402147 # good: [b019f4a4199f865b054262ff78f606ca70f7b981] arm64: dts: meson: g12a: Add AO Clock + Reset Controller support git bisect good b019f4a4199f865b054262ff78f606ca70f7b981 # first bad commit: [11a7bea17c9e0a36daab934d83e15a760f402147] arm64: dts: meson: g12a: add pinctrl support controllers ------------------------------------------------------------------------------- diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index abfa167751af..5e07e4ca3f4b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -104,6 +104,29 @@ #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>; + + periphs_pinctrl: pinctrl@40 { + compatible = "amlogic,meson-g12a-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@40 { + reg = <0x0 0x40 0x0 0x4c>, + <0x0 0xe8 0x0 0x18>, + <0x0 0x120 0x0 0x18>, + <0x0 0x2c0 0x0 0x40>, + <0x0 0x340 0x0 0x1c>; + reg-names = "gpio", + "pull", + "pull-enable", + "mux", + "ds"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 0 86>; + }; + }; }; hiu: bus@3c000 { @@ -150,6 +173,25 @@ clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "mpeg-clk"; }; + + ao_pinctrl: pinctrl@14 { + compatible = "amlogic,meson-g12a-aobus-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio_ao: bank@14 { + reg = <0x0 0x14 0x0 0x8>, + <0x0 0x1c 0x0 0x8>, + <0x0 0x24 0x0 0x14>; + reg-names = "mux", + "ds", + "gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ao_pinctrl 0 0 15>; + }; + }; }; sec_AO: ao-secure@140 {