From patchwork Fri Jul 22 08:26:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 72601 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp876267qga; Fri, 22 Jul 2016 01:27:42 -0700 (PDT) X-Received: by 10.98.149.131 with SMTP id c3mr4395360pfk.73.1469176062003; Fri, 22 Jul 2016 01:27:42 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a16si14722435pfj.8.2016.07.22.01.27.41; Fri, 22 Jul 2016 01:27:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751824AbcGVI1k (ORCPT + 7 others); Fri, 22 Jul 2016 04:27:40 -0400 Received: from arroyo.ext.ti.com ([198.47.19.12]:33575 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751441AbcGVI1i (ORCPT ); Fri, 22 Jul 2016 04:27:38 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u6M8QsE2021478; Fri, 22 Jul 2016 03:26:54 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u6M8QsB1027279; Fri, 22 Jul 2016 03:26:54 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Fri, 22 Jul 2016 03:26:53 -0500 Received: from [172.24.190.16] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u6M8QmuR012969; Fri, 22 Jul 2016 03:26:49 -0500 Subject: Re: [PATCH 2/2] ARM: DRA7: select PCI_DOMAINS config To: Tony Lindgren , Arnd Bergmann References: <1469102276-14777-1-git-send-email-kishon@ti.com> <1469102276-14777-3-git-send-email-kishon@ti.com> <8047226.VhgpLo8JQu@wuerfel> <20160722071644.GZ28140@atomide.com> CC: , , , , , , , , , From: Kishon Vijay Abraham I Message-ID: <5791D8C7.5020303@ti.com> Date: Fri, 22 Jul 2016 13:56:47 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <20160722071644.GZ28140@atomide.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, On Friday 22 July 2016 12:46 PM, Tony Lindgren wrote: > * Arnd Bergmann [160721 05:08]: >> On Thursday, July 21, 2016 5:27:56 PM CEST Kishon Vijay Abraham I wrote: >>> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig >>> index 1a648e9..8e6e2c0 100644 >>> --- a/arch/arm/mach-omap2/Kconfig >>> +++ b/arch/arm/mach-omap2/Kconfig >>> @@ -86,6 +86,7 @@ config SOC_DRA7XX >>> select OMAP_INTERCONNECT_BARRIER >>> select PM_OPP if PM >>> select ZONE_DMA if ARM_LPAE >>> + select PCI_DOMAINS if PCI >>> >>> config ARCH_OMAP2PLUS >>> bool >>> >> >> Should we just set this unconditionally for ARCH_MULTIPLATFORM maybe? > > Makes sense to me if many SoCs need this. since it doesn't harm even if a platform has a single PCIe port, it should be okay to set PCI_DOMAINS. I'll resend the following as a separate patch if it's okay. Thanks Kishon -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 90542db..0cccb50 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -338,6 +338,7 @@ config ARCH_MULTIPLATFORM select MULTI_IRQ_HANDLER select SPARSE_IRQ select USE_OF + select PCI_DOMAINS if PCI config ARM_SINGLE_ARMV7M bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"