[v5,10/10] riscv: defconfig: enable SOPHGO SoC

Message ID	53553d9a75740f528c4ea22860055bfb642a2cac.1696663037.git.unicorn_wang@outlook.com
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Headers	show Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 487F8E553 for <devicetree@vger.kernel.org>; Sat, 7 Oct 2023 07:58:02 +0000 (UTC) From: Chen Wang <unicornxw@gmail.com> To: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, devicetree@vger.kernel.org, guoren@kernel.org, jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org, xiaoguang.xing@sophgo.com, apatel@ventanamicro.com Cc: Chen Wang <unicorn_wang@outlook.com>, Conor Dooley <conor.dooley@microchip.com> Subject: [PATCH v5 10/10] riscv: defconfig: enable SOPHGO SoC Date: Sat, 7 Oct 2023 15:57:52 +0800 Message-Id: <53553d9a75740f528c4ea22860055bfb642a2cac.1696663037.git.unicorn_wang@outlook.com> In-Reply-To: <cover.1696663037.git.unicorn_wang@outlook.com> References: <cover.1696663037.git.unicorn_wang@outlook.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	Add Milk-V Pioneer RISC-V board support \| expand [v5,00/10] Add Milk-V Pioneer RISC-V board support [v5,01/10] riscv: Add SOPHGO SOC family Kconfig support [v5,02/10] dt-bindings: vendor-prefixes: add milkv/sophgo [v5,03/10] dt-bindings: riscv: add sophgo sg2042 bindings [v5,04/10] dt-bindings: riscv: Add T-HEAD C920 compatibles [v5,05/10] dt-bindings: interrupt-controller: Add Sophgo SG2042 PLIC [v5,06/10] dt-bindings: timer: Add Sophgo sg2042 CLINT timer [v5,07/10] dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi [v5,08/10] riscv: dts: add initial Sophgo SG2042 SoC device tree [v5,09/10] riscv: dts: sophgo: add Milk-V Pioneer board device tree [v5,10/10] riscv: defconfig: enable SOPHGO SoC

Message ID

53553d9a75740f528c4ea22860055bfb642a2cac.1696663037.git.unicorn_wang@outlook.com

State

New

Headers

From: Chen Wang <unicornxw@gmail.com>
To: aou@eecs.berkeley.edu,
	chao.wei@sophgo.com,
	conor@kernel.org,
	devicetree@vger.kernel.org,
	guoren@kernel.org,
	jszhang@kernel.org,
	krzysztof.kozlowski+dt@linaro.org,
	linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	palmer@dabbelt.com,
	paul.walmsley@sifive.com,
	robh+dt@kernel.org,
	xiaoguang.xing@sophgo.com,
	apatel@ventanamicro.com
Cc: Chen Wang <unicorn_wang@outlook.com>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v5 10/10] riscv: defconfig: enable SOPHGO SoC
Date: Sat,  7 Oct 2023 15:57:52 +0800
Message-Id: 
 <53553d9a75740f528c4ea22860055bfb642a2cac.1696663037.git.unicorn_wang@outlook.com>
In-Reply-To: <cover.1696663037.git.unicorn_wang@outlook.com>
References: <cover.1696663037.git.unicorn_wang@outlook.com>
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Series

Add Milk-V Pioneer RISC-V board support | expand

Commit Message

Chen Wang Oct. 7, 2023, 7:57 a.m. UTC

From: Chen Wang <unicorn_wang@outlook.com>

Enable SOPHGO SoC config in defconfig to allow the default
upstream kernel to boot on Milk-V Pioneer board.

Acked-by: Chao Wei <chao.wei@sophgo.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
[conor: fix the ordering]
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/configs/defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index ab86ec3b9eab..1edf3cd886c5 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -27,10 +27,11 @@  CONFIG_EXPERT=y
 CONFIG_PROFILING=y
 CONFIG_SOC_MICROCHIP_POLARFIRE=y
 CONFIG_ARCH_RENESAS=y
-CONFIG_ARCH_THEAD=y
 CONFIG_SOC_SIFIVE=y
+CONFIG_ARCH_SOPHGO=y
 CONFIG_SOC_STARFIVE=y
 CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_THEAD=y
 CONFIG_SOC_VIRT=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y

[v5,10/10] riscv: defconfig: enable SOPHGO SoC

Commit Message

Patch