From patchwork Mon Nov 16 12:59:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 324754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C925C4742C for ; Mon, 16 Nov 2020 12:59:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 27DCB223FB for ; Mon, 16 Nov 2020 12:59:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="BOhNvfNc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728041AbgKPM7j (ORCPT ); Mon, 16 Nov 2020 07:59:39 -0500 Received: from mail.kernel.org ([198.145.29.99]:54142 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726387AbgKPM7j (ORCPT ); Mon, 16 Nov 2020 07:59:39 -0500 Received: from mail.kernel.org (ip5f5ad5de.dynamic.kabel-deutschland.de [95.90.213.222]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 455E822245; Mon, 16 Nov 2020 12:59:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1605531578; bh=GUPB+pXdm5pA3gNIxo9qKqq8ImvUu/0WvSCY7Zx2+iw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BOhNvfNcU/5HRfARq+hvwOCpwKZqVZMTSsMmJTmfZcKuGF1aAe8nLcRFE32CtVY6n BF5Nw3wqnsW1Nyo23dLJ94i3J+eR71y0+DXk2s4zNKGqJiw+og4jHerUgu8bDkSgMk E5g8tHV1915Yd0xiifdshKqweHsOzvrsSAAX/7G0= Received: from mchehab by mail.kernel.org with local (Exim 4.94) (envelope-from ) id 1kee6Z-00Fyfe-Oz; Mon, 16 Nov 2020 13:59:35 +0100 From: Mauro Carvalho Chehab To: Rob Herring Cc: linuxarm@huawei.com, mauro.chehab@huawei.com, Mauro Carvalho Chehab , "John Stultz" , "Manivannan Sadhasivam" , Wei Xu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/8] arm64: dts: hisilicon: hi3670.dtsi: add I2C settings Date: Mon, 16 Nov 2020 13:59:31 +0100 Message-Id: <39b0576b5b8725584830d187142fe45120f6f69c.1605530560.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: MIME-Version: 1.0 Sender: Mauro Carvalho Chehab Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The I2C buses are not declared at the device tree. As this will be needed by further patches, add them, keeping all in disabled state. Per-board settings can override it. Signed-off-by: Mauro Carvalho Chehab --- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 71 +++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 2dcffa3ed218..40a422ddc8ec 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -709,5 +709,76 @@ dwmmc2: dwmmc2@fc183000 { card-detect-delay = <200>; status = "disabled"; }; + + /* I2C */ + i2c0: i2c@ffd71000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xffd71000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&iomcu HI3670_CLK_GATE_I2C0>; + resets = <&iomcu_rst 0x20 3>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>; + status = "disabled"; + }; + + i2c1: i2c@ffd72000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xffd72000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&iomcu HI3670_CLK_GATE_I2C1>; + resets = <&iomcu_rst 0x20 4>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>; + status = "disabled"; + }; + + i2c2: i2c@ffd73000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xffd73000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&iomcu HI3670_CLK_GATE_I2C2>; + resets = <&iomcu_rst 0x20 5>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>; + status = "disabled"; + }; + + i2c3: i2c@fdf0c000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xfdf0c000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3670_CLK_GATE_I2C3>; + resets = <&crg_rst 0x78 7>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>; + status = "disabled"; + }; + + i2c4: i2c@fdf0d000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xfdf0d000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3670_CLK_GATE_I2C4>; + resets = <&crg_rst 0x78 27>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>; + status = "disabled"; + }; }; };