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[34.78.140.88]) by smtp.gmail.com with ESMTPSA id p21-20020a05600c359500b0040e3488f16dsm42457536wmq.12.2024.01.23.07.34.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jan 2024 07:34:44 -0800 (PST) From: Tudor Ambarus To: broonie@kernel.org, andi.shyti@kernel.org, arnd@arndb.de Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, semen.protsenko@linaro.org, kernel-team@android.com, willmcvicker@google.com, Tudor Ambarus Subject: [PATCH 20/21] spi: s3c64xx: make the SPI alias optional for newer SoCs Date: Tue, 23 Jan 2024 15:34:19 +0000 Message-ID: <20240123153421.715951-21-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240123153421.715951-1-tudor.ambarus@linaro.org> References: <20240123153421.715951-1-tudor.ambarus@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The alias was used to initialize the port_id, which unfortunately is used for older SoCs to determine the FIFO size from ``s3c64xx_spi_port_config.fifo_lvl_mask``. This is wrong all the way as we shouldn't make a driver dependable of an alias, or the order of probe. If multiple FIFO sizes are supported across the SPI IPs, one shall instead introduce a fifosize device tree property. Make the SPI alias optional for the newer SoCs and mark the ``port_id`` and ``fifo_lvl_mask`` as deprecated. Signed-off-by: Tudor Ambarus --- drivers/spi/spi-s3c64xx.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index c4ddd2859ba4..9cd64fd3058a 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -128,7 +128,8 @@ struct s3c64xx_spi_dma_data { /** * struct s3c64xx_spi_port_config - SPI Controller hardware info - * @fifo_lvl_mask: Bit-mask for {TX|RX}_FIFO_LVL bits in SPI_STATUS register. + * @fifo_lvl_mask: [DEPRECATED] Bit-mask for {TX|RX}_FIFO_LVL bits in + * SPI_STATUS register. * @rx_lvl_offset: Bit offset of RX_FIFO_LVL bits in SPI_STATUS regiter. * @tx_st_done: Bit offset of TX_DONE bit in SPI_STATUS regiter. * @clk_div: Internal clock divider @@ -177,7 +178,7 @@ struct s3c64xx_spi_port_config { * @rx_dma: Local receive DMA data (e.g. chan and direction) * @tx_dma: Local transmit DMA data (e.g. chan and direction) * @port_conf: Local SPI port configuartion data - * @port_id: Port identification number + * @port_id: [DEPRECATED] Port identification number * @fifosize: size of the FIFO for this port */ struct s3c64xx_spi_driver_data { @@ -1152,7 +1153,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->pdev = pdev; if (pdev->dev.of_node) { ret = of_alias_get_id(pdev->dev.of_node, "spi"); - if (ret < 0) + if (ret < 0 && !sdd->port_conf->fifosize) return dev_err_probe(&pdev->dev, ret, "Failed to get alias id\n"); sdd->port_id = ret; @@ -1171,7 +1172,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->rx_dma.direction = DMA_DEV_TO_MEM; host->dev.of_node = pdev->dev.of_node; - host->bus_num = sdd->port_id; + host->bus_num = -1; host->setup = s3c64xx_spi_setup; host->cleanup = s3c64xx_spi_cleanup; host->prepare_transfer_hardware = s3c64xx_spi_prepare_transfer; @@ -1252,7 +1253,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) } dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d with %d Targets attached\n", - sdd->port_id, host->num_chipselect); + host->bus_num, host->num_chipselect); dev_dbg(&pdev->dev, "\tIOmem=[%pR]\tFIFO %dbytes\n", mem_res, sdd->fifosize);