| Message ID | 20240123-x1e80100-dts-missing-nodes-v4-5-072dc2f5c153@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | None | expand |
On 1/23/24 12:01, Abel Vesa wrote: > Add the TCSR clock controller and halt register space node. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- The former - yes, the latter - ? Konrad > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index be69e71b7f53..2b6c55a486b2 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -2606,6 +2606,14 @@ tcsr_mutex: hwlock@1f40000 { > #hwlock-cells = <1>; > }; > > + tcsr: clock-controller@1fc0000 { > + compatible = "qcom,x1e80100-tcsr", "syscon"; > + reg = <0 0x01fc0000 0 0x30000>; > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + > gem_noc: interconnect@26400000 { > compatible = "qcom,x1e80100-gem-noc"; > reg = <0 0x26400000 0 0x311200>; >
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index be69e71b7f53..2b6c55a486b2 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -2606,6 +2606,14 @@ tcsr_mutex: hwlock@1f40000 { #hwlock-cells = <1>; }; + tcsr: clock-controller@1fc0000 { + compatible = "qcom,x1e80100-tcsr", "syscon"; + reg = <0 0x01fc0000 0 0x30000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + gem_noc: interconnect@26400000 { compatible = "qcom,x1e80100-gem-noc"; reg = <0 0x26400000 0 0x311200>;
Add the TCSR clock controller and halt register space node. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)