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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon , Bjorn Helgaas , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Geert Uytterhoeven , Arnd Bergmann , Neil Armstrong , =?utf-8?q?N=C3=ADcolas_F_=2E_R_?= =?utf-8?q?=2E_A_=2E_Prado?= , Marek Szyprowski , Peng Fan , Robert Richter , Dan Williams , Jonathan Cameron , Terry Bowman , Lukas Wunner , Huacai Chen , Alex Elder , Srini Kandagatla , Greg Kroah-Hartman , Abel Vesa Cc: linux-wireless@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 2/9] arm64: dts: qcom: sm8550-qrd: add Wifi nodes Date: Wed, 17 Jan 2024 17:07:41 +0100 Message-Id: <20240117160748.37682-3-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240117160748.37682-1-brgl@bgdev.pl> References: <20240117160748.37682-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Neil Armstrong Describe the ath12k WLAN on-board the WCN7850 module present on the board. Signed-off-by: Neil Armstrong [Bartosz: - move the pcieport0 node into the .dtsi - make regulator naming consistent with existing DT code - add commit message] Signed-off-by: Bartosz Golaszewski --- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 37 +++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 +++++++ 2 files changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts index d401d63e5c4d..c07e2ea1c95c 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -813,6 +813,25 @@ &pcie0 { status = "okay"; }; +&pcieport0 { + wifi@0 { + compatible = "pci17cb,1107"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_en>, <&pmk8550_sleep_clk>; + + enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>; + + vddio-supply = <&vreg_l15b_1p8>; + vdd-supply = <&vreg_s5g_0p85>; + vddaon-supply = <&vreg_s2g_0p85>; + vdddig-supply = <&vreg_s4e_0p95>; + vddrfa1-supply = <&vreg_s6g_1p86>; + vddrfa2-supply = <&vreg_s4g_1p25>; + }; +}; + &pcie0_phy { vdda-phy-supply = <&vreg_l1e_0p88>; vdda-pll-supply = <&vreg_l3e_1p2>; @@ -900,6 +919,17 @@ &pcie_1_phy_aux_clk { clock-frequency = <1000>; }; +&pmk8550_gpios { + pmk8550_sleep_clk: sleep-clk-state { + pins = "gpio3"; + function = "func1"; + input-disable; + output-enable; + bias-disable; + power-source = <0>; + }; +}; + &qupv3_id_0 { status = "okay"; }; @@ -1035,6 +1065,13 @@ wcd_default: wcd-reset-n-active-state { bias-disable; output-low; }; + + wlan_en: wlan-en-state { + pins = "gpio80"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; }; &uart7 { diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index ee1ba5a8c8fc..1f2dd4262eb9 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1754,6 +1754,16 @@ pcie0: pcie@1c00000 { phy-names = "pciephy"; status = "disabled"; + + pcieport0: pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + bus-range = <0x01 0xff>; + }; }; pcie0_phy: phy@1c06000 {