From patchwork Fri Jan 12 09:46:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 762283 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FFA75EE6E; Fri, 12 Jan 2024 09:46:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="KX1/i9G5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1705052806; bh=xzl9gPWaWLVwF43xwbktPogCDQkqXUy+iSHTpf7+QEk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KX1/i9G5+CviCWZxLYvfavQ6cB3zo4pP9ZJH7JQKHMHvXHA0Ekb2KEsB9z8sazd2v qu3EZle3ivZ0jkXOmTBdmOiSbAuCxF3yveaKb0t3V6AcTNVigZDoPZdB9mWSYhMkc8 iHOqpGdnvc5CQtm+6wJ4f69ZDKRYG/yT6gZkZWy6ezHQkFj4TOGEl9vfHqVF4nnbh8 ZR7xFu1T+RJerAU3rbvhR70eNHE7JLJ07O8yEIe8xrBMsqnGk+M//JkBE6uxY5xytT 8ZsRr2w7gaPu7wiZNHSU0bDLCFzhrFFdu+dAnYmsjEpIyegJmKcazMFLs2fNKOk24q r0Q6f2kPX5hGA== Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id D3DA5378202D; Fri, 12 Jan 2024 09:46:45 +0000 (UTC) From: AngeloGioacchino Del Regno To: linux-mediatek@lists.infradead.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, hsinyi@chromium.org, nfraprado@collabora.com, macpaul.lin@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 08/15] arm64: dts: mediatek: radxa-nio-12l: Add support for eMMC and MicroSD Date: Fri, 12 Jan 2024 10:46:25 +0100 Message-ID: <20240112094632.66310-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> References: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable and properly configure the MMC0/1 controllers to add support for the eMMC and MicroSD slot (respectively) found on this board. Signed-off-by: AngeloGioacchino Del Regno --- .../dts/mediatek/mt8395-radxa-nio-12l.dts | 128 ++++++++++++++++++ 1 file changed, 128 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts index 3b8880db49ff..8492cf52413f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts @@ -276,6 +276,44 @@ mt6360_ldo7: ldo7 { }; }; +/* MMC0 Controller: eMMC (HS400). Power lines are shared with UFS! */ +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_default_pins>; + pinctrl-1 = <&mmc0_uhs_pins>; + bus-width = <8>; + max-frequency = <200000000>; + hs400-ds-delay = <0x14c11>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + no-sdio; + no-sd; + non-removable; + vmmc-supply = <&mt6359_vemc_1_ldo_reg>; + vqmmc-supply = <&mt6359_vufs_ldo_reg>; + status = "okay"; +}; + +/* MMC1 Controller: MicroSD card slot */ +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_default_pins>, <&mmc1_pins_detect>; + pinctrl-1 = <&mmc1_default_pins>; + bus-width = <4>; + max-frequency = <200000000>; + cap-sd-highspeed; + cd-gpios = <&pio 129 GPIO_ACTIVE_LOW>; + no-mmc; + no-sdio; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply = <&mt6360_ldo5>; + vqmmc-supply = <&mt6360_ldo3>; + status = "okay"; +}; + &mt6359_vaud18_ldo_reg { regulator-always-on; }; @@ -427,6 +465,96 @@ pins { }; }; + mmc0_default_pins: mmc0-default-pins { + pins-clk { + pinmux = ; + bias-pull-down = ; + drive-strength = <6>; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + bias-pull-up = ; + drive-strength = <6>; + input-enable; + }; + + pins-rst { + pinmux = ; + bias-pull-up = ; + drive-strength = <6>; + }; + }; + + mmc0_uhs_pins: mmc0-uhs-pins { + pins-clk { + pinmux = ; + bias-pull-down = ; + drive-strength = <8>; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + bias-pull-up = ; + drive-strength = <8>; + input-enable; + }; + + pins-ds { + pinmux = ; + bias-pull-down = ; + drive-strength = <8>; + }; + + pins-rst { + pinmux = ; + bias-pull-up = ; + drive-strength = <8>; + }; + }; + + mmc1_default_pins: mmc1-default-pins { + pins-clk { + pinmux = ; + bias-pull-down = ; + drive-strength = <8>; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + ; + bias-pull-up = ; + drive-strength = <8>; + input-enable; + }; + }; + + mmc1_pins_detect: mmc1-detect-pins { + pins-insert { + pinmux = ; + bias-pull-up; + }; + }; + mt6360_pins: mt6360-pins { pins-irq { pinmux = ,