From patchwork Fri Jan 12 09:46:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 762284 Received: from madrid.collaboradmins.com (madrid.collaboradmins.com [46.235.227.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 509105DF11; Fri, 12 Jan 2024 09:46:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="F/YirnXC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1705052804; bh=CzubW/gUVNGGtQYvTmtvySvTUAp6Dgbfxq213s18FKg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F/YirnXCcuauURatL3gA9Ezfh2b4mW5Nf/jA3AZueitmrViIoJ98qQWjFnlL8JPsr 3ig5FHK9trCUpirGTpl6/mTwzv+30lVhfVDYIab/J1N1GecOA9vlsY8rq0AjmFcLfr NeikVvgq74L1e8yWL63zVmrqj+ZaEvq/9YNnXrg9IA/CMT8LOo3VKsnCus1KUIGh4E bhRHgNu6XIFgbEOfjh+By/qhdA/ovqEYS7yXyLpePtaRT1Z+vFqPBpah3w+dY8+Uq/ 3DmFbg7nceqPFO4xcs7hP9LkqiovUtDM+euW2jeE5yjPeDomPUiP1s+7jPz3i+635f E26Bk9AX2Bilw== Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madrid.collaboradmins.com (Postfix) with ESMTPSA id CF5C23781FCF; Fri, 12 Jan 2024 09:46:43 +0000 (UTC) From: AngeloGioacchino Del Regno To: linux-mediatek@lists.infradead.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, hsinyi@chromium.org, nfraprado@collabora.com, macpaul.lin@mediatek.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 06/15] arm64: dts: mediatek: radxa-nio-12l: Add Ethernet controller and Xceiver Date: Fri, 12 Jan 2024 10:46:23 +0100 Message-ID: <20240112094632.66310-7-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> References: <20240112094632.66310-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Configure and enable the ethernet controller found on the MT8395 SoC, along with the MDIO PHY/Transceiver (RTL8211FD) found on this board, enabling 10/100/1000M Ethernet connectivity. Signed-off-by: AngeloGioacchino Del Regno --- .../dts/mediatek/mt8395-radxa-nio-12l.dts | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts index 0daf27410311..221d7062d5ef 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts @@ -21,6 +21,7 @@ / { compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195"; aliases { + ethernet0 = ð serial0 = &uart0; }; @@ -132,6 +133,26 @@ apu_mem: memory@62000000 { }; }; +ð { + phy-mode = "rgmii-rxid"; + phy-handle = <&rgmii_phy>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ð_default_pins>; + pinctrl-1 = <ð_sleep_pins>; + mediatek,tx-delay-ps = <2030>; + mediatek,mac-wol; + snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; + snps,reset-delays-us = <0 20000 100000>; + status = "okay"; + + mdio { + rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; + reg = <0x1>; + }; + }; +}; + &i2c2 { clock-frequency = <400000>; pinctrl-0 = <&i2c2_pins>; @@ -297,6 +318,77 @@ &mt6359_vsram_others_ldo_reg { }; &pio { + eth_default_pins: eth-default-pins { + pins-cc { + pinmux = , + , + , + ; + drive-strength = <8>; + }; + + pins-mdio { + pinmux = , + ; + input-enable; + }; + + pins-power { + pinmux = , + ; + output-high; + }; + + pins-rst { + pinmux = ; + }; + + pins-rxd { + pinmux = , + , + , + ; + }; + + pins-txd { + pinmux = , + , + , + ; + drive-strength = <8>; + }; + }; + + eth_sleep_pins: eth-sleep-pins { + pins-cc { + pinmux = , + , + , + ; + }; + + pins-mdio { + pinmux = , + ; + bias-disable; + input-disable; + }; + + pins-rxd { + pinmux = , + , + , + ; + }; + + pins-txd { + pinmux = , + , + , + ; + }; + }; + i2c2_pins: i2c2-pins { pins-bus { pinmux = ,