From patchwork Tue Jan 9 17:19:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 761181 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACD783AC25; Tue, 9 Jan 2024 17:20:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="xmiYQpsA" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 409HK1S0072326; Tue, 9 Jan 2024 11:20:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1704820801; bh=VawEpna3v0lS7GPRRlnu64Wvw1h5R0QsWm64N4grDiw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xmiYQpsARtN81uqOzExACSARNxYnhZvs4K0pyNiKgxK2BJzbiJfcdiB3+ZV8vxNJs tQN/JZcPK1Jf0hcRMO7dYO8iJTHC4g47Dojqj2Q/fJTpPEcC25YGuy+PeugZcaQXGb J6vM3E+qLYpUyLRXoZNJrkHHCulmNNhtXak5EflM= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 409HK1pE123483 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 9 Jan 2024 11:20:01 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 9 Jan 2024 11:20:00 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 9 Jan 2024 11:20:00 -0600 Received: from lelvsmtp5.itg.ti.com ([10.249.40.136]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 409HJouF089645; Tue, 9 Jan 2024 11:20:00 -0600 From: Andrew Davis To: Frank Binns , Matt Coster , "H . Nikolaus Schaller" , Adam Ford , Ivaylo Dimitrov , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Paul Cercueil CC: , , , , , , , Andrew Davis Subject: [PATCH 10/11] ARM: dts: sun6i: Add device tree entry for SGX GPU Date: Tue, 9 Jan 2024 11:19:49 -0600 Message-ID: <20240109171950.31010-11-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240109171950.31010-1-afd@ti.com> References: <20240109171950.31010-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Add SGX GPU device entry to base sun6i-a31 dtsi file. Signed-off-by: Andrew Davis Reviewed-by: Javier Martinez Canillas --- arch/arm/boot/dts/allwinner/sun6i-a31.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi index 5cce4918f84c9..e6998783b89aa 100644 --- a/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi @@ -962,6 +962,15 @@ mdio: mdio { }; }; + gpu: gpu@1c40000 { + compatible = "allwinner,sun6i-a31-gpu", "img,powervr-sgx544"; + reg = <0x01c40000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_GPU_CORE>, <&ccu CLK_GPU_MEMORY>; + clock-names = "core", "mem"; + status = "disabled"; + }; + crypto: crypto-engine@1c15000 { compatible = "allwinner,sun6i-a31-crypto", "allwinner,sun4i-a10-crypto";