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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/w1/w1-uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: UART 1-Wire Bus
+
+maintainers:
+ - Christoph Winklhofer <cj.winklhofer@gmail.com>
+
+description: |
+ UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
+ to create the 1-Wire timing patterns.
+
+ The UART peripheral must support full-duplex and operate in open-drain
+ mode. The timing patterns are generated by a specific combination of
+ baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
+ write bit or reset pulse.
+
+ The default baud-rate for reset and presence detection is 9600 and for
+ a 1-Wire read or write operation 115200. In case the actual baud-rate
+ is different from the requested one, the transmitted byte is adapted
+ to generate the 1-Wire timing patterns.
+
+ https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html
+
+
+properties:
+ compatible:
+ const: w1-uart
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ serial {
+ onewire {
+ compatible = "w1-uart";
+ };
+ };