From patchwork Mon Jan 1 16:15:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 759311 Received: from mail-ej1-f42.google.com (mail-ej1-f42.google.com [209.85.218.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D194E63C3 for ; Mon, 1 Jan 2024 16:16:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="QE+ujRuG" Received: by mail-ej1-f42.google.com with SMTP id a640c23a62f3a-a26f73732c5so546116966b.3 for ; Mon, 01 Jan 2024 08:16:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1704125770; x=1704730570; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mmQnQzOW0HVCglZmRdERbSkiK/7LfpA/GFNr/QR6hMQ=; b=QE+ujRuGAEA39jI8LryiXAuogFFKFGSBNSqM3/SO5hZNSdn2AiDo3BJ9HOITXJ6Igd ErcXDPs+XMq9pKSvB9KEbKgEQgBQCMpnQchWeGF9qtQJJdF5gmtDL3xdMaf4yW7lNCFI NPM2nL4vMRzhSPZmJ/RjSdg2XhoPUfO41Dykk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704125770; x=1704730570; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mmQnQzOW0HVCglZmRdERbSkiK/7LfpA/GFNr/QR6hMQ=; b=P2r7Cs1BGZI8lQSloRgcwmQe3A0nhJrGDY8br8kvc1wzXx/D8bjaWZRmiLbpwccCwt TYQN7zNdx/jXfe3FYzo5vJDry9t1R2aLwHfnPyXMfqHjeEV2qni2NkmeX48PtAwPBbJq EvXBVZaEyRPSzUPhRnBXHzHnpxdNgoHAjAuQWYd2Q0AgaZU/bUEqL6IjRIdE/xLFXbZa AkrMyPw7C6L9wg+fEKV5Dz5UxlrDMVtW1JdujZTdGPryVPSLueYRG705SqXGuWBDac4Y WMJbHRA6fk4HE6m7Qa7tZ7q4Nu63GKgX3ldMboU9Lk2KJbNIffDjgssPklBXYMTGjriP zDPg== X-Gm-Message-State: AOJu0YzM2JSOCX4h6IEiW4XCuNjTMYhfJz0FJWDUArva5wgmUrgvju/y 0DzsDamPNP+gbUxQ0tcUrNybxkQEotszUBycc5AkJJ/HU3U= X-Google-Smtp-Source: AGHT+IFdF2Y+nTGHLUaguJWX+3aGLaOjSRJsTPkiCfXpzOtTfYoIOWEGnxwxuVAhhORfllxdkJ7K4A== X-Received: by 2002:a17:907:6e90:b0:a23:482:ee74 with SMTP id sh16-20020a1709076e9000b00a230482ee74mr9370722ejc.28.1704125770180; Mon, 01 Jan 2024 08:16:10 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-48-44-179.retail.telecomitalia.it. [82.48.44.179]) by smtp.gmail.com with ESMTPSA id ep16-20020a1709069b5000b00a27d5e9b3ebsm1897857ejc.105.2024.01.01.08.16.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Jan 2024 08:16:09 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Alexandre Torgue , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v2 2/8] ARM: dts: stm32: add DSI support on stm32f769 Date: Mon, 1 Jan 2024 17:15:45 +0100 Message-ID: <20240101161601.2232247-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240101161601.2232247-1-dario.binacchi@amarulasolutions.com> References: <20240101161601.2232247-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for MIPI DSI Host controller. Since MIPI DSI is not available on stm32f746, the patch adds the "stm32f769.dtsi" file containing the dsi node inside. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/st/stm32f769.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi diff --git a/arch/arm/boot/dts/st/stm32f769.dtsi b/arch/arm/boot/dts/st/stm32f769.dtsi new file mode 100644 index 000000000000..e09184f7079c --- /dev/null +++ b/arch/arm/boot/dts/st/stm32f769.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 Dario Binacchi + */ + +#include "stm32f746.dtsi" + +/ { + soc { + dsi: dsi@40016c00 { + compatible = "st,stm32-dsi"; + reg = <0x40016c00 0x800>; + interrupts = <98>; + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>; + clock-names = "pclk", "ref"; + resets = <&rcc STM32F7_APB2_RESET(DSI)>; + reset-names = "apb"; + status = "disabled"; + }; + }; +};