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[107.15.241.140]) by smtp.gmail.com with ESMTPSA id eq20-20020a05622a5e1400b004278e7f122esm3382294qtb.25.2023.12.27.19.21.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Dec 2023 19:21:33 -0800 (PST) From: John Clark To: "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Heiko Stuebner" , linux-rockchip@lists.infradead.org Cc: "Thomas McKahan" , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, John Clark Subject: [PATCH] arm64: dts: rockchip: nanopc-t6 sdmmc device tuning Date: Thu, 28 Dec 2023 03:21:13 +0000 Message-ID: <20231228032114.1157-1-inindev@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 1) sdmmc on the nanopc-t6 is powered by vcc3v3_sd_s0, not vcc_3v3_s3 add the supply vcc3v3_sd_s0, and control it with gpio4_a5 2) add the card detection property gpio0_a4 3) drop max-frequency = <200000000> as it is already defined in rk3588s.dtsi 4) order no-sdio & no-mmc properties while we are here Signed-off-by: John Clark --- .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 27 ++++++++++++++++--- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts index e83b71510a47..2360735e58a1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts @@ -159,6 +159,19 @@ vcc3v3_pcie30: vcc3v3-pcie30-regulator { regulator-max-microvolt = <3300000>; vin-supply = <&vcc5v0_sys>; }; + + vcc3v3_sd_s0: vcc3v3-sd-s0-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sd_s0_pwren>; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "vcc3v3_sd_s0"; + vin-supply = <&vcc_3v3_s3>; + }; }; &combphy0_ps { @@ -503,6 +516,12 @@ pcie_m2_1_pwren: pcie-m21-pwren { }; }; + sdmmc { + sd_s0_pwren: sd-s0-pwren { + rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + usb { typec5v_pwren: typec5v-pwren { rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; @@ -536,15 +555,15 @@ &sdhci { }; &sdmmc { - max-frequency = <200000000>; - no-sdio; - no-mmc; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; disable-wp; + no-mmc; + no-sdio; sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_s3>; + vmmc-supply = <&vcc3v3_sd_s0>; vqmmc-supply = <&vccio_sd_s0>; status = "okay"; };