From patchwork Tue Dec 19 14:54:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 756104 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38C6A37D0B; Tue, 19 Dec 2023 14:54:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="aJcqxiuM" Received: by mail.gandi.net (Postfix) with ESMTPSA id 3812040009; Tue, 19 Dec 2023 14:54:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1702997688; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jzW2JR3KUHEBRvbUZ7SjMZvoo6agNjWiHJ41yASPvJk=; b=aJcqxiuMtphsbOJDgOQgGXFv9oXj1R2pBkky5UQf5hja8CM7txnmYwBGBAI4XbP6V8qRdY C77Pw6F0VhT10q5DHM9T8rvGWJV4ASEOFfbFcxLIVcJAN/UiHDI8RDS4qN3+UduXYlF9B1 h7JfwmshDbJaW4WkgSUKCw/igEfeWCQX78BQk+X3PpL0uGha65K9Kn7NT8R5y6hyCSfsGG A2xUjiarZhJxQIj/SlYXGOu/xQlq0eL0R8eSCfLlqf3NXMgVUrvjCdARUw/B4VOGLzdKgt 1fYRymmyrTM3skVhJB9ztnByhaeDFHJoRHXxCeLCaNQF18WApSdQdyu71IfbAA== From: Luca Ceresoli Date: Tue, 19 Dec 2023 15:54:17 +0100 Subject: [PATCH v2 2/6] ASoC: dt-bindings: Add Rockchip RK3308 internal audio codec Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231219-rk3308-audio-codec-v2-2-c70d06021946@bootlin.com> References: <20231219-rk3308-audio-codec-v2-0-c70d06021946@bootlin.com> In-Reply-To: <20231219-rk3308-audio-codec-v2-0-c70d06021946@bootlin.com> To: Nicolas Frattaroli , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel Cc: Thomas Petazzoni , linux-rockchip@lists.infradead.org, linux-sound@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Luca Ceresoli X-Mailer: b4 0.12.4 X-GND-Sasl: luca.ceresoli@bootlin.com Add device tree bindings document for the internal audio codec of the Rockchip RK3308 SoC. Signed-off-by: Luca Ceresoli --- Changed in v2: - reword commit title - add maxItems to resets - remove quotes from reset-names - use percent values for rockchip,micbias-avdd-multiplier - use name compliant to the docs in the example --- .../bindings/sound/rockchip,rk3308-codec.yaml | 98 ++++++++++++++++++++++ MAINTAINERS | 5 ++ 2 files changed, 103 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml new file mode 100644 index 000000000000..27a9e5bcfa58 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/rockchip,rk3308-codec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3308 Internal Codec + +description: | + This is the audio codec embedded in the Rockchip RK3308 + SoC. It has 8 24-bit ADCs and 2 24-bit DACs. The maximum supported + sampling rate is 192 kHz. + + It is connected internally to one out of a selection of the internal I2S + controllers. + + The RK3308 audio codec has 8 independent capture channels, but some + features work on stereo pairs called groups: + * grp 0 -- MIC1 / MIC2 + * grp 1 -- MIC3 / MIC4 + * grp 2 -- MIC5 / MIC6 + * grp 3 -- MIC7 / MIC8 + +maintainers: + - Luca Ceresoli + +properties: + compatible: + const: rockchip,rk3308-codec + + reg: + maxItems: 1 + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the General Register Files (GRF) + + clocks: + items: + - description: clock for TX + - description: clock for RX + - description: AHB clock driving the interface + + clock-names: + items: + - const: mclk_tx + - const: mclk_rx + - const: hclk + + resets: + maxItems: 1 + + reset-names: + items: + - const: codec + + "#sound-dai-cells": + const: 0 + + rockchip,micbias-avdd-percent: + description: | + Voltage setting for the MICBIAS pins expressed as a percentage of + AVDD. + + E.g. if rockchip,micbias-avdd-percent = 85 and AVDD = 3v3, then the + MIC BIAS voltage will be 3.3 V * 85% = 2.805 V. + + enum: [ 50, 55, 60, 65, 70, 75, 80, 85 ] + +required: + - compatible + - reg + - rockchip,grf + - clocks + - resets + - "#sound-dai-cells" + +additionalProperties: false + +examples: + - | + #include + + audio-codec: audio-codec@ff560000 { + compatible = "rockchip,rk3308-codec"; + reg = <0xff560000 0x10000>; + rockchip,grf = <&grf>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + clocks = <&cru SCLK_I2S2_8CH_TX_OUT>, + <&cru SCLK_I2S2_8CH_RX_OUT>, + <&cru PCLK_ACODEC>; + reset-names = "codec"; + resets = <&cru SRST_ACODEC_P>; + #sound-dai-cells = <0>; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 9104430e148e..feddd6610b51 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18669,6 +18669,11 @@ S: Maintained F: Documentation/devicetree/bindings/media/rockchip-rga.yaml F: drivers/media/platform/rockchip/rga/ +ROCKCHIP RK3308 INTERNAL AUDIO CODEC +M: Luca Ceresoli +S: Maintained +F: Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml + ROCKCHIP VIDEO DECODER DRIVER M: Ezequiel Garcia L: linux-media@vger.kernel.org