From patchwork Mon Dec 18 16:47:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshul Dalal X-Patchwork-Id: 756156 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DE681D148; Mon, 18 Dec 2023 16:50:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EGyVZkZP" Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-6d7fd937e0eso920153b3a.1; Mon, 18 Dec 2023 08:50:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702918211; x=1703523011; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=IkpQ7ULp2+EbxwsyiU5Y+XH1E1Lrbc8Y3UDZM+Jimvc=; b=EGyVZkZPE2sJ0L0N0HYwqFwjUrbwZKI3AiooV/5qsAi6ow3Z5YScdNc4rQCGPBIu0D LJjwV6UiaXuMEggijP2LL7B6OnYTKOVCzVWSF0qcUlUPXAG3td+8MVcHRbC7IEOoo2HD 9mWfWIG85sECSSjfnSR5W4uyLsa3UBZYO6bdXQLOzw/hYMT6c7CD4LzG6mc0o1nuAmCi MWl0RtkAIy5dLsoEVQOS45j0X+QTreeqlBHC1r12g9M+0zJ6wr+L5fbSjV7lVgMHTxp6 lX1J9ctVyAlLSXuF//X5QmKJBUj4EWLh3jPIFGvZUau4IZM2vlB9bMRFkuBN9n8BuiTN aHEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702918211; x=1703523011; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=IkpQ7ULp2+EbxwsyiU5Y+XH1E1Lrbc8Y3UDZM+Jimvc=; b=UcrOlCrbLJUsKwrIpNSgTi/XKE5svKQlHJkvMqaC+NfdqL9oheKbSi/NyNsRkDOT4c /p58V9GvSLZyVCxNPMc7NA2/XHxBwXajltESQxUwCnKKHLHhD93w6rsYiRRn02neiMb3 las0e4ynDTVDXVaVxbrp9oTzqgRPBOJgsmPBVaqD1nVWxt0QlC4y6SdnLLrqJnG6N0lU F6ZD+eS4r6koB9Szpo1S7EF5BewzdaMbxYw8c4IQdLiJLFXaSNccONa5ridltRmUQ6nD m0BWiN7JvV/rqbGwNI4IvUJEJKFsKTQ8m21pGUix0X5FFyydjAOXJdRoZO6BIaspaINa qLrw== X-Gm-Message-State: AOJu0YwIRfT9QoG5gm0n9ebqGe48GOON9rYgbeWjYnL2t4CGRpjtiZqn ss9nZsVYgrO3Mtw64TUAYmRFY5x6e0lC7A== X-Google-Smtp-Source: AGHT+IHMlIlqvTS9/uo97eOJqUybjmnws/cIuwBDQoDXwuLLTTvmg2ZCoDIh0+oobhUS99SSrSam1w== X-Received: by 2002:a05:6a21:199:b0:194:80ca:4e2f with SMTP id le25-20020a056a21019900b0019480ca4e2fmr881752pzb.56.1702918211213; Mon, 18 Dec 2023 08:50:11 -0800 (PST) Received: from localhost.localdomain ([2401:4900:581e:798e:871c:98db:5638:a4]) by smtp.gmail.com with ESMTPSA id hy9-20020a056a006a0900b006d38dfaab9asm4324933pfb.136.2023.12.18.08.50.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Dec 2023 08:50:10 -0800 (PST) From: Anshul Dalal To: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, Jonathan Cameron , devicetree@vger.kernel.org Cc: Anshul Dalal , Conor Dooley , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , linux-kernel-mentees@lists.linuxfoundation.org, Shuah Khan , Conor Dooley Subject: [PATCH v3 1/2] dt-bindings: iio: dac: add MCP4821 Date: Mon, 18 Dec 2023 22:17:33 +0530 Message-ID: <20231218164735.787199-1-anshulusr@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Adds support for MCP48xx series of DACs. Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/22244B.pdf #MCP48x1 Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/20002249B.pdf #MCP48x2 Reviewed-by: Conor Dooley Signed-off-by: Anshul Dalal --- Changes for v3: - Added gpios for ldac and shutdown pins - Added spi-cpha and spi-cpol for the SPI mode 0 and 3 Changes for v2: - Changed order in device table to numerical - Made vdd_supply required - Added 'Reviewed-by: Conor Dooley' Previous versions: v2: https://lore.kernel.org/lkml/20231217180836.584828-1-anshulusr@gmail.com/ v1: https://lore.kernel.org/lkml/20231117073040.685860-1-anshulusr@gmail.com/ --- .../bindings/iio/dac/microchip,mcp4821.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml new file mode 100644 index 000000000000..5b1707d974e2 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/microchip,mcp4821.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MCP4821 and similar DACs + +description: | + Supports MCP48x1 (single channel) and MCP48x2 (dual channel) series of DACs. + Device supports simplex communication over SPI in Mode 0 and Mode 3. + + +---------+--------------+-------------+ + | Device | Resolution | Channels | + |---------|--------------|-------------| + | MCP4801 | 8-bit | 1 | + | MCP4802 | 8-bit | 2 | + | MCP4811 | 10-bit | 1 | + | MCP4812 | 10-bit | 2 | + | MCP4821 | 12-bit | 1 | + | MCP4822 | 12-bit | 2 | + +---------+--------------+-------------+ + + Datasheet: + MCP48x1: https://ww1.microchip.com/downloads/en/DeviceDoc/22244B.pdf + MCP48x2: https://ww1.microchip.com/downloads/en/DeviceDoc/20002249B.pdf + +maintainers: + - Anshul Dalal + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + enum: + - microchip,mcp4801 + - microchip,mcp4802 + - microchip,mcp4811 + - microchip,mcp4812 + - microchip,mcp4821 + - microchip,mcp4822 + + reg: + maxItems: 1 + + vdd-supply: true + + ldac-gpios: + description: | + Active Low LDAC (Latch DAC Input) pin used to update the DAC output. + maxItems: 1 + + shdn-gpios: + description: | + Active Low pin used to enter the shutdown mode. + maxItems: 1 + + spi-cpha: true + spi-cpol: true + +required: + - compatible + - reg + - vdd-supply + +additionalProperties: false + +examples: + - | + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "microchip,mcp4821"; + reg = <0>; + vdd-supply = <&vdd_regulator>; + ldac-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; + shdn-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; + spi-cpha; + spi-cpol; + }; + };