| Message ID | 20231218085456.3962720-4-xu.yang_2@nxp.com |
|---|---|
| State | Accepted |
| Commit | cb040019c0e131a49c1351d5d3db3f4c462ca3ab |
| Headers | show |
| Series | [v2,1/5] arm64: dts: imx8ulp: add usb nodes | expand |
Hi, thanks for the update. Am Montag, 18. Dezember 2023, 09:54:55 CET schrieb Xu Yang: > There are 2 USB controllers on i.MX93. Add them. > > Signed-off-by: Xu Yang <xu.yang_2@nxp.com> > --- > Changes in v2: > - fix format as suggested by Alexander > - change compatible from fsl,imx8mm-usb to fsl,imx93-usb > --- > arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ > 1 file changed, 58 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi > b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..043ec8dc9aca > 100644 > --- a/arch/arm64/boot/dts/freescale/imx93.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi > @@ -171,6 +171,20 @@ cm33: remoteproc-cm33 { > status = "disabled"; > }; > > + usbphynop1: usbphynop1 { > + compatible = "usb-nop-xceiv"; > + #phy-cells = <0>; > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > + clock-names = "main_clk"; > + }; > + > + usbphynop2: usbphynop2 { > + compatible = "usb-nop-xceiv"; > + #phy-cells = <0>; > + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; > + clock-names = "main_clk"; > + }; > + > soc@0 { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -1059,5 +1073,49 @@ ddr-pmu@4e300dc0 { > reg = <0x4e300dc0 0x200>; > interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; > }; > + > + usbotg1: usb@4c100000 { > + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; > + reg = <0x4c100000 0x200>; > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > + <&clk IMX93_CLK_HSIO_32K_GATE>; > + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; > + assigned-clock-rates = <133000000>; > + fsl,usbphy = <&usbphynop1>; fsl,usbphy is depreacated. Please refer to Documentation/devicetree/bindings/ usb/ci-hdrc-usb2.yaml > + fsl,usbmisc = <&usbmisc1 0>; > + status = "disabled"; > + }; > + > + usbmisc1: usbmisc@4c100200 { > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- usbmisc", > + "fsl,imx6q-usbmisc"; > + reg = <0x4c100200 0x200>; > + #index-cells = <1>; > + }; > + > + usbotg2: usb@4c200000 { > + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; > + reg = <0x4c200000 0x200>; > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, > + <&clk IMX93_CLK_HSIO_32K_GATE>; > + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; > + assigned-clocks = <&clk IMX93_CLK_HSIO>; > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; > + assigned-clock-rates = <133000000>; > + fsl,usbphy = <&usbphynop2>; fsl,usbphy is depreacated. Please refer to Documentation/devicetree/bindings/ usb/ci-hdrc-usb2.yaml > + fsl,usbmisc = <&usbmisc2 0>; > + status = "disabled"; > + }; > + > + usbmisc2: usbmisc@4c200200 { > + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d- usbmisc", > + "fsl,imx6q-usbmisc"; > + reg = <0x4c200200 0x200>; > + #index-cells = <1>; > + }; Please insert these nodes sorted by node address. It should be inserted before ddr-pmu. Best regards, Alexander > }; > };
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 34c0540276d1..043ec8dc9aca 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -171,6 +171,20 @@ cm33: remoteproc-cm33 { status = "disabled"; }; + usbphynop1: usbphynop1 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; + clock-names = "main_clk"; + }; + + usbphynop2: usbphynop2 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>; + clock-names = "main_clk"; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; @@ -1059,5 +1073,49 @@ ddr-pmu@4e300dc0 { reg = <0x4e300dc0 0x200>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; }; + + usbotg1: usb@4c100000 { + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x4c100000 0x200>; + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, + <&clk IMX93_CLK_HSIO_32K_GATE>; + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; + assigned-clocks = <&clk IMX93_CLK_HSIO>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates = <133000000>; + fsl,usbphy = <&usbphynop1>; + fsl,usbmisc = <&usbmisc1 0>; + status = "disabled"; + }; + + usbmisc1: usbmisc@4c100200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + reg = <0x4c100200 0x200>; + #index-cells = <1>; + }; + + usbotg2: usb@4c200000 { + compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x4c200000 0x200>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>, + <&clk IMX93_CLK_HSIO_32K_GATE>; + clock-names = "usb_ctrl_root_clk", "usb_wakeup_clk"; + assigned-clocks = <&clk IMX93_CLK_HSIO>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; + assigned-clock-rates = <133000000>; + fsl,usbphy = <&usbphynop2>; + fsl,usbmisc = <&usbmisc2 0>; + status = "disabled"; + }; + + usbmisc2: usbmisc@4c200200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + reg = <0x4c200200 0x200>; + #index-cells = <1>; + }; }; };
There are 2 USB controllers on i.MX93. Add them. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> --- Changes in v2: - fix format as suggested by Alexander - change compatible from fsl,imx8mm-usb to fsl,imx93-usb --- arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++ 1 file changed, 58 insertions(+)