From patchwork Mon Dec 11 03:37:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 752728 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="RdFYcCip" Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37716D43; Sun, 10 Dec 2023 19:38:29 -0800 (PST) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 3BB27kGn029249; Mon, 11 Dec 2023 03:38:20 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=9NfvdFC2EYrrss4aSEXmAl9jdp0/puQebxdHhbUnyac =; b=RdFYcCipNJgwLzZPVkch4UBAR2M4rfxKfb4MVNVLYA9VpKUxq+yozWhORHK z+d0Lp26LBnvbxD0jyLHlf6Wobx+79osIXuCBVi7fgjrs/ZdL8+Tlf0GiMTDRDaD nQ7sDdlX1bzKJKDoPZuYXyvHP9w/J483CYq0bvS5JvzZpllDvIg+aCmcHT/qJjH2 ItCkLdQLtInfC62h0lvdLJ9nvURJpPbbLrKL/kwaCo451szIK4gIUcFM80R0SGJZ eS+fg/3UVSBIEw73PzAuKiGR14OoXXj5Ls6lp4PjUezZYz9ktV8+HRjWWifJfZlt 5ZvunAaZo3rLyygj2rQSeiOsAqA== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3uvnyva3r6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 11 Dec 2023 03:38:19 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3BB3cI4i013230 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 11 Dec 2023 03:38:19 GMT Received: from hu-kathirav-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Sun, 10 Dec 2023 19:38:13 -0800 From: Kathiravan Thirumoorthy Date: Mon, 11 Dec 2023 09:07:30 +0530 Subject: [PATCH v3 8/8] arm64: defconfig: build NSS Clock Controller driver for Qualcomm IPQ5332 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20231211-ipq5332-nsscc-v3-8-ad13bef9b137@quicinc.com> References: <20231211-ipq5332-nsscc-v3-0-ad13bef9b137@quicinc.com> In-Reply-To: <20231211-ipq5332-nsscc-v3-0-ad13bef9b137@quicinc.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Catalin Marinas , Will Deacon CC: , , , , , , "Kathiravan Thirumoorthy" , Krzysztof Kozlowski X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1702265852; l=770; i=quic_kathirav@quicinc.com; s=20230906; h=from:subject:message-id; bh=Wyt/ZD2zWouzMmJKcqtLO2jKDDDuwiTIji8eQvd5l8U=; b=3hLQRYFXCDtmBM/AuWKgfyZWbOdH1wuR/+L6LD7teKTOtSKNdc8aEfnCW9M1QuR0QDqz45wzD HCfBuzJ5TrlACluSA5w+U5sZqud2GVu//2kgitNMh3iIlIzMktRrTTf X-Developer-Key: i=quic_kathirav@quicinc.com; a=ed25519; pk=xWsR7pL6ch+vdZ9MoFGEaP61JUaRf0XaZYWztbQsIiM= X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Wobte5RxnbFxxQdpbZQZASP8Jegg0c2L X-Proofpoint-ORIG-GUID: Wobte5RxnbFxxQdpbZQZASP8Jegg0c2L X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=771 suspectscore=0 spamscore=0 bulkscore=0 clxscore=1015 phishscore=0 adultscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2312110028 NSSCC driver is needed to enable the ethernet interfaces and not necessary for the bootup of the SoC, hence build it as a module. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Kathiravan Thirumoorthy --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index be89fa9e6468..a12182cc8cc9 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1229,6 +1229,7 @@ CONFIG_QCOM_CLK_SMD_RPM=y CONFIG_QCOM_CLK_RPMH=y CONFIG_IPQ_APSS_6018=y CONFIG_IPQ_GCC_5332=y +CONFIG_IPQ_NSSCC_5332=m CONFIG_IPQ_APSS_5018=y CONFIG_IPQ_GCC_5018=y CONFIG_IPQ_GCC_6018=y