From patchwork Sun Dec 3 12:40:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Lunn X-Patchwork-Id: 750178 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=feathertop.org header.i=@feathertop.org header.b="r7zE6P8J"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="oqf5Wclf" Received: from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com [66.111.4.26]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C549C2 for ; Sun, 3 Dec 2023 04:41:14 -0800 (PST) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 035975C0136; Sun, 3 Dec 2023 07:41:14 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Sun, 03 Dec 2023 07:41:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=feathertop.org; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1701607273; x= 1701693673; bh=0Z34ircSgmagFzebZpYklzEym10DzlMEfWeocShNPWY=; b=r 7zE6P8JIuCguI2jomXAU+50xySPtpLF/UhhyVSrzIS6RYxccMt2pHW5A3KmyCoHF UAvIV6FcNm4zr0IF1AW65A9C/HcjjOJmIFfLRctwafDHt/wbDWkwUD2GSXf/TG9P hDHH67RPZPHyT0WQJ+H20gRkktr9fWlWy2PGyAZXCshKjjfFZj6l+e4UsBm8Eqjj 4As4VPikuD+jPtE67v7QnG98a3eRTX6+ivh464QVwFqjrmgphKMoDNjRD8CKiCvM +6Yv0HHpEqWyfFrNfBn3Uz/ER4leyIlMhqEfSKxlOk2jwkb+Hp9JzqLwzU+bF8Vw 6fTxCYNSZOQLV49Dfjk+Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t=1701607273; x= 1701693673; bh=0Z34ircSgmagFzebZpYklzEym10DzlMEfWeocShNPWY=; b=o qf5WclfJqgRZLvV626Md+9yITaxMq+aKIuIbk7Zz3OIafdffy/5SI7S18EmaDM/D VylGzP5wcUIHkPECuttm16e3uE25kLREp+l6XxQdgvoTBDL09tgPYXV5LmzSZs4K +0ptg4tYxrQgzC5Wai1jrNoFdNlUlUwJNFRdojP9lUAVZODS1ZSZcrQ1UIWpx8Co yVO34hQdnHEBZNGMIwb1aOplKm8hKDUSjxSwtMvbtprFUIOa9vJ0QJ+K4YaYb10+ XTiSTJfy0VKY19V1Kf/5Yn4Kn6Uzu+eyGlH1kLCJN0cU2ei81AL3lsxkIXu5eaCI 2PXfOPv8UM6tYVCJsUh7Q== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvkedrudejgedggeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepvfhimhcu nfhunhhnuceothhimhesfhgvrghthhgvrhhtohhprdhorhhgqeenucggtffrrghtthgvrh hnpeefffeuhfetgeeikeejvefgtdefteehgfdvhfetfeeuffeuhffhfeekgfekgeehieen ucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehtihhmse hfvggrthhhvghrthhophdrohhrgh X-ME-Proxy: Feedback-ID: i1f8241ce:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 3 Dec 2023 07:41:09 -0500 (EST) Received: by feathertop.org (sSMTP sendmail emulation); Sun, 03 Dec 2023 23:41:06 +1100 From: Tim Lunn To: linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org Cc: Jagan Teki , Conor Dooley , linux-arm-kernel@lists.infradead.org, Rob Herring , Heiko Stuebner , Krzysztof Kozlowski , Tim Lunn Subject: [PATCH v3 6/8] ARM: dts: rockchip: Add rv1109 SoC Date: Sun, 3 Dec 2023 23:40:02 +1100 Message-Id: <20231203124004.2676174-7-tim@feathertop.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231203124004.2676174-1-tim@feathertop.org> References: <20231203124004.2676174-1-tim@feathertop.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Rockchip rv1109 SoC is a dual core version of the rv1126. It is otherwise identical and shares the same device tree config. This patch introduces a dtsi file to drop the additional cpu nodes. Taken from Rockchip BSP kernel. Signed-off-by: Tim Lunn --- (no changes since v2) Changes in v2: - new patch arch/arm/boot/dts/rockchip/rv1109.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 arch/arm/boot/dts/rockchip/rv1109.dtsi diff --git a/arch/arm/boot/dts/rockchip/rv1109.dtsi b/arch/arm/boot/dts/rockchip/rv1109.dtsi new file mode 100644 index 000000000000..9cbaa08ab1b8 --- /dev/null +++ b/arch/arm/boot/dts/rockchip/rv1109.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; + +#include "rv1126.dtsi" + +/ { + compatible = "rockchip,rv1109"; + + cpus { + /delete-node/ cpu@f02; + /delete-node/ cpu@f03; + }; + + arm-pmu { + interrupts = , + ; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; +};