From patchwork Sat Dec 2 12:51:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 749556 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JHzXUTJb" Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A82DBF0; Sat, 2 Dec 2023 04:52:04 -0800 (PST) Received: by mail-ed1-x536.google.com with SMTP id 4fb4d7f45d1cf-548f853fc9eso3994173a12.1; Sat, 02 Dec 2023 04:52:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1701521523; x=1702126323; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HR4GQ7+5atR3ar2YrCztGhjSeU/LO6OVqwoc3hEbrC0=; b=JHzXUTJbiNd69oDg7MX0RyDjAE16AQiOxixZLk1Pd7r8N2fsJErw+AQaPoyTWEe9NS p863rOeQqq6wBS9Odv52pmIhOeQ4Pfj7pntvH5JWiaY1cfJ1aLqCgf3TudMEIeWuTTfO V1Hj0Ie55zClqmiuk93Y8VkhHoamU+mvWzgKKcQ5BouxE7IWq7GFck3W/lU8Iaq8O5dG R+llIpOZ3I37VNDCPD8O9iERFP51vS83LidtJuZBFkC+sBGKXp6TmXuslWWY3cPM+Kr4 vdOF33yGOFEkMZwiYPvi2tEbOYO3gLOFLm2duJQ/1RIbnF5OX5lb4xmL7slOYj6U/Y2M ZBRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701521523; x=1702126323; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HR4GQ7+5atR3ar2YrCztGhjSeU/LO6OVqwoc3hEbrC0=; b=oWvFvl1Qo6Hgh5jNCjCdBFCVkwSlGf71rQmz/WCm7wRxyg78JezdILtKSEuNv6cAZ/ yVwBT62v2BCKtNYh+0zfC2WUnxKsi/60JoH5KN9NvpwUTPnJq5V1GM3DxtQf6IFp35Y1 Vqs7HtBG875he/JiZM/gxwXojjkl7/+rV9Z81tLhUC6vHvIkLuyiIlIXj2ZL6tv/AY9b TOMQVxThVujxM4y6fkEGdH+k470mN7sgARGYAU7PwpnyWnoSpp7n66J/96Lk7ENVcdVc JmXvRIoIWvnxXKALOuTchTLuK3/mi6K4Iv78hqDiK1HKOB07B2ILrV0kKXc4cVYpbUdx yRGg== X-Gm-Message-State: AOJu0YyekrVK7hxqguICiYkSgJb480gOpjStUuE1Km5IodVzhBjL5gHz rD8c4Ht117A82pjSk3Q3qA== X-Google-Smtp-Source: AGHT+IFsV7yIlBBzkDPIYNDCqw3wEkc8AQ/SUwRG3frSQ5X+KzW+68Zbs/ntALcZcfg6t9TIXCXl8g== X-Received: by 2002:a17:906:35ca:b0:a19:a1ba:bacb with SMTP id p10-20020a17090635ca00b00a19a1babacbmr891820ejb.113.1701521523169; Sat, 02 Dec 2023 04:52:03 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:908e:b829:354b:f8ee]) by smtp.gmail.com with ESMTPSA id g5-20020a170906198500b009c5c5c2c5a4sm3018161ejd.219.2023.12.02.04.52.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Dec 2023 04:52:02 -0800 (PST) From: Alex Bee To: Heiko Stuebner , Conor Dooley , Krzysztof Kozlowski , Rob Herring Cc: Daniel Vetter , David Airlie , Thomas Zimmermann , Maxime Ripard , Maarten Lankhorst , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-pm@vger.kernel.org, Alex Bee Subject: [PATCH v2 4/5] ARM: dts: rockchip: Add GPU node for RK3128 Date: Sat, 2 Dec 2023 13:51:43 +0100 Message-ID: <20231202125144.66052-5-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231202125144.66052-1-knaerzche@gmail.com> References: <20231202125144.66052-1-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RK3128 SoCs have Mali400 MP2 GPU. Add the respective device tree node and the correspondending opp-table. The frequencies and voltages of the opp-table have been taken from downstream kernel. Signed-off-by: Alex Bee --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 44 ++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index b72905db04f7..b05ee3d926aa 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -101,6 +101,27 @@ opp-1200000000 { }; }; + gpu_opp_table: opp-table-1 { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <975000 975000 1250000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1050000 1050000 1250000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1150000 1150000 1250000>; + }; + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-microvolt = <1250000 1250000 1250000>; + }; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -131,6 +152,29 @@ smp-sram@0 { }; }; + gpu: gpu@10090000 { + compatible = "rockchip,rk3128-mali", "arm,mali-400"; + reg = <0x10090000 0x10000>; + interrupts = , + , + , + , + , + ; + interrupt-names = "gp", + "gpmmu", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1"; + clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; + clock-names = "bus", "core"; + power-domains = <&power RK3128_PD_GPU>; + resets = <&cru SRST_GPU>; + operating-points-v2 = <&gpu_opp_table>; + status = "disabled"; + }; + pmu: syscon@100a0000 { compatible = "rockchip,rk3128-pmu", "syscon", "simple-mfd"; reg = <0x100a0000 0x1000>;