From patchwork Thu Nov 23 15:26:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 746643 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Qa0TaAX3" Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A2C3D5A; Thu, 23 Nov 2023 07:26:52 -0800 (PST) Received: by mail.gandi.net (Postfix) with ESMTPSA id B949424000C; Thu, 23 Nov 2023 15:26:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1700753211; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=F1EYqlVYF1fJ33cC2a0Mertg3uhTJJ/NIkImZDHepJg=; b=Qa0TaAX35przqfse0Y7pj19YS8keDDV1tZXDJA74SmXNXAAw+P/mEhobnbrAHkicEhQX7P IylTzzUBtrXI3qMH6FqGegR7P9u8iB3YhnGTyAc2wFcm4yeLqw9a8oPJsTm5D0k6PF7m7N m9WgwgEDDPnPNVkMAqZjnVagYxNfKsqjTrNNZ2e71Nf0hWcGA7ZfX/vd+THXdVEPovQFnq f8WyYJKBKThZBAic8j3xqrrbKtNaOQ1qtSVQ1RNJryMKGvdYOOoluMOa6Vts7VRgH7mPiQ mpJkztcNxwRKn7NnWd+p+2035Q0Xw8Im/92jbjxFVg95QZI8hJDCFac6SKHh3Q== From: Gregory CLEMENT To: Paul Burton , Thomas Bogendoerfer , linux-mips@vger.kernel.org, Jiaxun Yang , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Vladimir Kondratiev , Tawfik Bayouk , Alexandre Belloni , =?utf-8?q?Th=C3=A9o_Lebr?= =?utf-8?q?un?= , Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Florian Fainelli Subject: [PATCH v2 01/21] MIPS: compressed: Use correct instruction for 64 bit code Date: Thu, 23 Nov 2023 16:26:18 +0100 Message-ID: <20231123152639.561231-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231123152639.561231-1-gregory.clement@bootlin.com> References: <20231123152639.561231-1-gregory.clement@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: gregory.clement@bootlin.com The code clearing BSS already use macro or use correct instruction depending if the CPU is 32 bits or 64 bits. However, a few instructions remained 32 bits only. By using the accurate MACRO, it is now possible to deal with memory address beyond 32 bits. As a side effect, when using 64bits processor, it also divides the loop number needed to clear the BSS by 2. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Florian Fainelli Signed-off-by: Gregory CLEMENT --- arch/mips/boot/compressed/head.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S index 5795d0af1e1b2..d237a834b85ee 100644 --- a/arch/mips/boot/compressed/head.S +++ b/arch/mips/boot/compressed/head.S @@ -25,8 +25,8 @@ /* Clear BSS */ PTR_LA a0, _edata PTR_LA a2, _end -1: sw zero, 0(a0) - addiu a0, a0, 4 +1: PTR_S zero, 0(a0) + PTR_ADDIU a0, a0, PTRSIZE bne a2, a0, 1b PTR_LA a0, (.heap) /* heap address */