From patchwork Wed Nov 22 12:22:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Lunn X-Patchwork-Id: 746176 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=feathertop.org header.i=@feathertop.org header.b="MiO1O0W5"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="V09sdPuJ" Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20C681A8 for ; Wed, 22 Nov 2023 04:24:05 -0800 (PST) Received: from compute7.internal (compute7.nyi.internal [10.202.2.48]) by mailout.west.internal (Postfix) with ESMTP id D36E63200B2B; Wed, 22 Nov 2023 07:24:03 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute7.internal (MEProxy); Wed, 22 Nov 2023 07:24:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=feathertop.org; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1700655843; x= 1700742243; bh=jhTsnmAl5/DmW6EKKVEBlGQazQUFkpjvjuIRfHHxlxE=; b=M iO1O0W5Lh8PT2bOZTYcDns2zJTBjmh/QCPr3pD5trFpFWYHvY72qPR3QYk8zq41Z aen+RvAgf//xad5kOS0QC8sx6CqL5Bae6OPfuPg46XgEbKHQS3W69k6nF6tkiMYp 3qvIM/O6IsWh+OMVrDt1yhl9EMA75E2cIR7TlQKqnEiaty3E5QIG+uvZS9Feir3J rTI5zVr8liBGfPq+hmwSuZlH7AMCTboYpFedeZ1sGAR9DqR6BeMfUhH6TDuiWSVn 3xGgFJas6b6IJG/0rMOniEUdiglXqE4gzW+tTKWAzUwcajdosbuO6wCdt6urIKi3 beZzB0SUMQhZpZv8Gsu2w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t=1700655843; x= 1700742243; bh=jhTsnmAl5/DmW6EKKVEBlGQazQUFkpjvjuIRfHHxlxE=; b=V 09sdPuJk0L9uXPv+3w9+QajkMcEWG0rXeJMMIPQTzmConfbBmA7E1vBi1/7b5we2 7Kri+gC20rjQV6Q4YVaamN5vwdVJTVFWv/FDrD0L841vFum+lxjTMeLhnpwsFVrt 5cD2hzmxOQs21vVh9f5elbweJ8r9bffyuwZCr2raStfv0isG6b7oVM0i1I8st1ol yMuQiKRCd/8WuejFK7r1ysnDnutvL64Hv0o6VRUQ4icpnvLptzpkBXCAi2f1MhVx t9N9qaPLJiHmaieJmKyDZNK+HXi+xStl8KkWmzz2gZNDpQsdmmDArPWf1bBhohHP 7ZpbjO4O9q75Hxw+dFThw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvkedrudehuddgfeelucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepvfhimhcu nfhunhhnuceothhimhesfhgvrghthhgvrhhtohhprdhorhhgqeenucggtffrrghtthgvrh hnpeefffeuhfetgeeikeejvefgtdefteehgfdvhfetfeeuffeuhffhfeekgfekgeehieen ucevlhhushhtvghrufhiiigvpedunecurfgrrhgrmhepmhgrihhlfhhrohhmpehtihhmse hfvggrthhhvghrthhophdrohhrgh X-ME-Proxy: Feedback-ID: i1f8241ce:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 22 Nov 2023 07:23:58 -0500 (EST) Received: by feathertop.org (sSMTP sendmail emulation); Wed, 22 Nov 2023 23:23:55 +1100 From: Tim Lunn To: linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org Cc: Tim Lunn , Jagan Teki , Rob Herring , linux-arm-kernel@lists.infradead.org, Heiko Stuebner , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v2 7/9] ARM: dts: rockchip: Add rv1109 SoC Date: Wed, 22 Nov 2023 23:22:30 +1100 Message-Id: <20231122122232.952696-8-tim@feathertop.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231122122232.952696-1-tim@feathertop.org> References: <20231122122232.952696-1-tim@feathertop.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Rockchip rv1109 SoC is a dual core version of the rv1126. It is otherwise identical and shares the same device tree config. This patch introduces a dtsi file to drop the additional cpu nodes. Taken from Rockchip BSP kernel. Signed-off-by: Tim Lunn --- Changes in v2: - new patch arch/arm/boot/dts/rockchip/rv1109.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 arch/arm/boot/dts/rockchip/rv1109.dtsi diff --git a/arch/arm/boot/dts/rockchip/rv1109.dtsi b/arch/arm/boot/dts/rockchip/rv1109.dtsi new file mode 100644 index 000000000000..9cbaa08ab1b8 --- /dev/null +++ b/arch/arm/boot/dts/rockchip/rv1109.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; + +#include "rv1126.dtsi" + +/ { + compatible = "rockchip,rv1109"; + + cpus { + /delete-node/ cpu@f02; + /delete-node/ cpu@f03; + }; + + arm-pmu { + interrupts = , + ; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; +};