| Message ID | 20231122121235.827122-10-peterlin@andestech.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Support Andes PMU extension | expand |
On Wed, Nov 22, 2023 at 08:12:31PM +0800, Yu Chien Peter Lin wrote: > Document the ISA string for T-Head performance monitor extension > which provides counter overflow interrupt mechanism. > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > --- > Changes v2 -> v3: > - New patch > Changes v3 -> v4: > - No change > --- > Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > index c91ab0e46648..694efaea8fce 100644 > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > @@ -258,5 +258,11 @@ properties: > in commit 2e5236 ("Ztso is now ratified.") of the > riscv-isa-manual. > > + - const: xtheadpmu > + description: > + The T-Head performance monitor extension for counter overflow. For more > + details, see the chapter 12 in the Xuantie C906 user manual. > + https://github.com/T-head-Semi/openc906/tree/main/doc I'm pretty sure that I asked on the previous revision for you to identify a specific revision of this document. Cheers, Conor.
Hi Conor, On Thu, Nov 23, 2023 at 02:48:20PM +0000, Conor Dooley wrote: > On Wed, Nov 22, 2023 at 08:12:31PM +0800, Yu Chien Peter Lin wrote: > > Document the ISA string for T-Head performance monitor extension > > which provides counter overflow interrupt mechanism. > > > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > > --- > > Changes v2 -> v3: > > - New patch > > Changes v3 -> v4: > > - No change > > --- > > Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > > index c91ab0e46648..694efaea8fce 100644 > > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > > @@ -258,5 +258,11 @@ properties: > > in commit 2e5236 ("Ztso is now ratified.") of the > > riscv-isa-manual. > > > > + - const: xtheadpmu > > + description: > > + The T-Head performance monitor extension for counter overflow. For more > > + details, see the chapter 12 in the Xuantie C906 user manual. > > + https://github.com/T-head-Semi/openc906/tree/main/doc > > I'm pretty sure that I asked on the previous revision for you to > identify a specific revision of this document. Sorry, I'm still searching for it. Regards, Peter Lin > Cheers, > Conor.
Hi Guo Ren, On Thu, Nov 23, 2023 at 05:14:30AM +0800, Guo Ren wrote: > On Wed, Nov 22, 2023 at 8:17 PM Yu Chien Peter Lin > <peterlin@andestech.com> wrote: > > > > Document the ISA string for T-Head performance monitor extension > > which provides counter overflow interrupt mechanism. > > > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > > --- > > Changes v2 -> v3: > > - New patch > > Changes v3 -> v4: > > - No change > > --- > > Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > > index c91ab0e46648..694efaea8fce 100644 > > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > > @@ -258,5 +258,11 @@ properties: > > in commit 2e5236 ("Ztso is now ratified.") of the > > riscv-isa-manual. > > > > + - const: xtheadpmu > > + description: > > + The T-Head performance monitor extension for counter overflow. For more > > + details, see the chapter 12 in the Xuantie C906 user manual. > > + https://github.com/T-head-Semi/openc906/tree/main/doc > > + > > additionalProperties: true > > ... > > -- > > 2.34.1 > > > Reviewed-by: Guo Ren <guoren@kernel.org> Thanks for the review. Would you share document about T-Head PMU? Best regards, Peter Lin > -- > Best Regards > Guo Ren
On Wed, Nov 29, 2023 at 04:47:38PM +0800, Yu-Chien Peter Lin wrote: > Hi Conor, > > On Thu, Nov 23, 2023 at 02:48:20PM +0000, Conor Dooley wrote: > > On Wed, Nov 22, 2023 at 08:12:31PM +0800, Yu Chien Peter Lin wrote: > > > Document the ISA string for T-Head performance monitor extension > > > which provides counter overflow interrupt mechanism. > > > > > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > > > --- > > > Changes v2 -> v3: > > > - New patch > > > Changes v3 -> v4: > > > - No change > > > --- > > > Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > > > index c91ab0e46648..694efaea8fce 100644 > > > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > > > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > > > @@ -258,5 +258,11 @@ properties: > > > in commit 2e5236 ("Ztso is now ratified.") of the > > > riscv-isa-manual. > > > > > > + - const: xtheadpmu > > > + description: > > > + The T-Head performance monitor extension for counter overflow. For more > > > + details, see the chapter 12 in the Xuantie C906 user manual. > > > + https://github.com/T-head-Semi/openc906/tree/main/doc > > > > I'm pretty sure that I asked on the previous revision for you to > > identify a specific revision of this document. > > Sorry, I'm still searching for it. Identifying a specific commit from that repo as the revision would be okay. Follow the format used elsewhere for the standard extensions. Cheers, Conor.
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index c91ab0e46648..694efaea8fce 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -258,5 +258,11 @@ properties: in commit 2e5236 ("Ztso is now ratified.") of the riscv-isa-manual. + - const: xtheadpmu + description: + The T-Head performance monitor extension for counter overflow. For more + details, see the chapter 12 in the Xuantie C906 user manual. + https://github.com/T-head-Semi/openc906/tree/main/doc + additionalProperties: true ...
Document the ISA string for T-Head performance monitor extension which provides counter overflow interrupt mechanism. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> --- Changes v2 -> v3: - New patch Changes v3 -> v4: - No change --- Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ 1 file changed, 6 insertions(+)