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Tue, 7 Nov 2023 12:09:06 -0600 From: Kris Chaplin To: , , , , , CC: , , , Conor Dooley Subject: [PATCH v3 1/2] dt-bindings: w1: Add YAML DT schema for AMD AXI w1 host and MAINTAINERS entry Date: Tue, 7 Nov 2023 10:06:51 -0800 Message-ID: <20231107180814.615933-2-kris.chaplin@amd.com> X-Mailer: git-send-email 2.42.GIT In-Reply-To: <20231107180814.615933-1-kris.chaplin@amd.com> References: <20231107180814.615933-1-kris.chaplin@amd.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB55:EE_|LV8PR12MB9263:EE_ X-MS-Office365-Filtering-Correlation-Id: efe517ae-26e8-47d7-0eb9-08dbdfbca39b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8AzlrHpaXaHswXu+ywA/baLPUDBBmYn8ZXxEOT07r6+rloaXItFKeCUiO/tQ2pbMKnK3hSLeWyUCwmxJINDIH5gsEyX9uZVZDnRAqp9MX9R8gjfa89Hwq3z0Q78SR+unVP0zCoW1ybcny9aQrxNOoNmnk74OuCjyJBGD8SEiGpV1Wltjvpk2xHp+8IgZDU2EYftMPGS+/T49CzVu1o97z+c7tRiQI5OY08b+Jlt0UN6X2cQGtAKqucpwueMe+HQ/o8vbiu1lm5QCS0qJNHmVKcDgmj63Wl1AoeFcY400oBYdiuhn6ai5StlXnpJ9wDKcC1I3dFsPLmYSZgg6XMSZH1ROKctYWUwIzwV6cjMymzZrDlsxhe+O50/6E81cT5CIqUjL4uqAxr7OkGuaOj2t7SNdn9KhMHi23D7BgcJ9DAyBAkOUA4heb8v2CVwuiM7IghkNM8nzeAj3bIFgf1na47GovQXL/esS+mgq1Nd92IWhCVDsUArPtoI698qe+AovJ6H7dxWgTPUxZizQBjgYiAL3RW6Ox0n8ZmIP5yLyr1bVmXtc8vDL6N2twrSbiahzrg2S2fA02MJWwCsU6ghYPjksRmtwQrQ8lHzFZmi+yY84EDogyfvP7DJYYKGCZU1Cnbvu50uMbsL782G35Zsc4px8/pzwaqUdkRP+jPDFgKz4CzoWCP1kx4Fzd6+lAnvPotqUghzMX95+9J3dl3wlUQkfZRMDUKWyPhVsMc6Uzyqu01NwOhbnDQ5Z3eLv4iV99m2rOY8ooIzox37eb75v68OETE4NyNdf05pNeXN19oc= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB55.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9263 Add YAML DT schema for the AMD AXI w1 host IP. This hardware guarantees protocol timing for driving off-board devices such as thermal sensors, proms, etc using the 1wire protocol. The IP has a register to detect hardware version and so the binding does not have an explict version number. Add MAINTAINERS entry for DT schema. Co-developed-by: Thomas Delev Signed-off-by: Thomas Delev Signed-off-by: Kris Chaplin Reviewed-by: Conor Dooley --- .../bindings/w1/amd,axi-1wire-host.yaml | 44 +++++++++++++++++++ MAINTAINERS | 7 +++ 2 files changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/w1/amd,axi-1wire-host.yaml diff --git a/Documentation/devicetree/bindings/w1/amd,axi-1wire-host.yaml b/Documentation/devicetree/bindings/w1/amd,axi-1wire-host.yaml new file mode 100644 index 000000000000..ef70fa2c0c5d --- /dev/null +++ b/Documentation/devicetree/bindings/w1/amd,axi-1wire-host.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/w1/amd,axi-1wire-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD AXI 1-wire bus host for programmable logic + +maintainers: + - Kris Chaplin + +properties: + compatible: + const: amd,axi-1wire-host + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - interrupts + +additionalProperties: false + +examples: + - | + #include + + onewire@a0000000 { + compatible = "amd,axi-1wire-host"; + reg = <0xa0000000 0x10000>; + clocks = <&zynqmp_clk 0x47>; + interrupts = ; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 375b2c87d099..2b23febfaf72 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -891,6 +891,13 @@ Q: https://patchwork.kernel.org/project/linux-rdma/list/ F: drivers/infiniband/hw/efa/ F: include/uapi/rdma/efa-abi.h +AMD AXI W1 DRIVER +M: Kris Chaplin +R: Thomas Delev +R: Michal Simek +S: Maintained +F: Documentation/devicetree/bindings/w1/amd,axi-1wire-host.yaml + AMD CDX BUS DRIVER M: Nipun Gupta M: Nikhil Agarwal