From patchwork Sun Oct 8 04:46:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "J, KEERTHY" X-Patchwork-Id: 731658 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96B3617D8 for ; Sun, 8 Oct 2023 04:48:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="GPogWL3I" Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E6BD1AD; Sat, 7 Oct 2023 21:47:48 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3984lWd0046811; Sat, 7 Oct 2023 23:47:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1696740452; bh=ycxt9XkUM0KJfNbE0rw+23bIGBKxz3cZaPVs/zY1XZQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GPogWL3IddDS/re5uDVPrpo1O4YcVeiaCh9KaVCNohJXJ5xxB/TwZagv73tpykVIW T6D33Mx/FXQoqqp/t36gqwdzEu1Ll+k+yA2nT91zD3WEpD38F+V+6ciHCuZAqImV4t J/JLsM9iF7q8i6oWpKEj0J/78tg1ryukw69HqS9w= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3984lWRN010936 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 7 Oct 2023 23:47:32 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 7 Oct 2023 23:47:31 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 7 Oct 2023 23:47:31 -0500 Received: from localhost.localdomain (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3984l1Cs032705; Sat, 7 Oct 2023 23:47:28 -0500 From: Keerthy To: , , , , , CC: , , , , Subject: [PATCH v8 7/7] arm64: dts: ti: k3-j712s2-mcu: Add the mcu domain watchdog instances Date: Sun, 8 Oct 2023 10:16:57 +0530 Message-ID: <20231008044657.25788-8-j-keerthy@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231008044657.25788-1-j-keerthy@ti.com> References: <20231008044657.25788-1-j-keerthy@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net There are totally 2 instances of watchdog module in MCU domain. These instances are coupled with the MCU domain R5F instances. Reserving them as they are not used by A72. Signed-off-by: Keerthy --- .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index f94aa3a34e22..00a908a7d7ff 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -709,4 +709,30 @@ ti,esm-pins = <63>; bootph-pre-ram; }; + + /* + * The 2 RTI instances are couple with MCU R5Fs so keeping them + * reserved as these will be used by their respective firmware + */ + mcu_watchdog0: watchdog@40600000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x40600000 0x00 0x100>; + clocks = <&k3_clks 295 1>; + power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 295 1>; + assigned-clock-parents = <&k3_clks 295 5>; + /* reserved for MCU_R5F0_0 */ + status = "reserved"; + }; + + mcu_watchdog1: watchdog@40610000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x00 0x40610000 0x00 0x100>; + clocks = <&k3_clks 296 1>; + power-domains = <&k3_pds 296 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks = <&k3_clks 296 1>; + assigned-clock-parents = <&k3_clks 296 5>; + /* reserved for MCU_R5F0_1 */ + status = "reserved"; + }; };