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[92.34.211.33]) by smtp.gmail.com with ESMTPSA id 28-20020ac25f5c000000b005068d6de988sm410569lfz.226.2023.10.07.05.30.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Oct 2023 05:30:51 -0700 (PDT) From: Linus Walleij Date: Sat, 07 Oct 2023 14:30:50 +0200 Subject: [PATCH v2 2/2] rtc: rtc7301: Support byte-addressed IO Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231007-rtc-7301-regwidth-v2-2-c913aa95f666@linaro.org> References: <20231007-rtc-7301-regwidth-v2-0-c913aa95f666@linaro.org> In-Reply-To: <20231007-rtc-7301-regwidth-v2-0-c913aa95f666@linaro.org> To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Akinobu Mita , Howard Harte Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net The old RTC7301 driver in OpenWrt used byte access, but the current mainline Linux driver uses 32bit word access. Make this configurable using device properties using the standard property "reg-io-width" in e.g. device tree. This is needed for the USRobotics USR8200 which has the chip connected using byte accesses. Debugging and testing by Howard Harte. Signed-off-by: Linus Walleij --- drivers/rtc/rtc-r7301.c | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/drivers/rtc/rtc-r7301.c b/drivers/rtc/rtc-r7301.c index 5dbaeb7af648..ef913cf8593f 100644 --- a/drivers/rtc/rtc-r7301.c +++ b/drivers/rtc/rtc-r7301.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -55,12 +56,23 @@ struct rtc7301_priv { u8 bank; }; -static const struct regmap_config rtc7301_regmap_config = { +/* + * When the device is memory-mapped, some platforms pack the registers into + * 32-bit access using the lower 8 bits at each 4-byte stride, while others + * expose them as simply consecutive bytes. + */ +static const struct regmap_config rtc7301_regmap_32_config = { .reg_bits = 32, .val_bits = 8, .reg_stride = 4, }; +static const struct regmap_config rtc7301_regmap_8_config = { + .reg_bits = 8, + .val_bits = 8, + .reg_stride = 1, +}; + static u8 rtc7301_read(struct rtc7301_priv *priv, unsigned int reg) { int reg_stride = regmap_get_reg_stride(priv->regmap); @@ -356,7 +368,9 @@ static int __init rtc7301_rtc_probe(struct platform_device *dev) void __iomem *regs; struct rtc7301_priv *priv; struct rtc_device *rtc; + static const struct regmap_config *mapconf; int ret; + u32 val; priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -366,8 +380,25 @@ static int __init rtc7301_rtc_probe(struct platform_device *dev) if (IS_ERR(regs)) return PTR_ERR(regs); + ret = device_property_read_u32(&dev->dev, "reg-io-width", &val); + if (ret) + /* Default to 32bit accesses */ + val = 4; + + switch (val) { + case 1: + mapconf = &rtc7301_regmap_8_config; + break; + case 4: + mapconf = &rtc7301_regmap_32_config; + break; + default: + dev_err(&dev->dev, "invalid reg-io-width %d\n", val); + return -EINVAL; + } + priv->regmap = devm_regmap_init_mmio(&dev->dev, regs, - &rtc7301_regmap_config); + mapconf); if (IS_ERR(priv->regmap)) return PTR_ERR(priv->regmap);