From patchwork Mon Oct 2 17:13:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Wolsieffer X-Patchwork-Id: 729061 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 717C51A73C for ; Mon, 2 Oct 2023 17:14:13 +0000 (UTC) Received: from mail-vs1-xe29.google.com (mail-vs1-xe29.google.com [IPv6:2607:f8b0:4864:20::e29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18525B3 for ; Mon, 2 Oct 2023 10:14:12 -0700 (PDT) Received: by mail-vs1-xe29.google.com with SMTP id ada2fe7eead31-4526a936dcaso12937137.2 for ; Mon, 02 Oct 2023 10:14:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hefring-com.20230601.gappssmtp.com; s=20230601; t=1696266851; x=1696871651; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+Mtj4NCPRxZ6VOa3hAfKfXCzeZnGQjZkkPegFeXl3ak=; b=dcBt5dq4PmXpgwCWCtvzziGiKdoAEkVeOXd9VspMbpP8IkbsSSzzu2iHhiTEnrrdVv +pEJ5lZG0BbWwwAqA/8hjVy3mgvLUVvuTQyxlC1KM6ha8mUVopN9WHev8H1s6JGORj8V gstip1+CgTy6eIxNp9cQ7gTpzxzFa81RHyfMaC4GM7mThKJGFztUhG7RH6JO8xrAAhxN /TP1eSfxO9WXkJND5KtHW4VZLv9CZ8Ovnj9ga35Svm6DX5FBIONpJdd/8VMviasTGqIi Qz7VoQjn3El8RTPnyOHtIU4hVS73cCislSYskBuCLPBtexiG1wUNrcEmnIgCWeUAH3a/ yuLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696266851; x=1696871651; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+Mtj4NCPRxZ6VOa3hAfKfXCzeZnGQjZkkPegFeXl3ak=; b=qdF+5ykX1eSphWlbJRkPwpNeYhje/cpJFHJRklsq2p7ah3bhBK38ef8x7ecPPh/l0W BoBjx/ozD2eYJUMlf08P3CaxUDgQxzMMXGgyIiy7u7fn6z/CxN7f3ZzJPrytMlgJ5L8b l3ydBP0AEGdEBmUPkufNugJtS0I0taM/k5ORTKBW1ndhH81MeagZnVTwH4xc/UpB7pbF /DDpO/hJO8WydN5Z/yCBX2Kkgmd3jj4lCk/SWUKmmeoT0lWrrFbRXv7VxxSrAWeIdvkV 9pwZ3lezx4uPhMRn0uBvN9FoBydqHXIAxLtdoqCZETWSKSN4W1ib0LKFlyhdX3eGiHdr P21w== X-Gm-Message-State: AOJu0Yx+I7AtLOlscjkpBSOdF7zxwKl82050baQ9dLXRr7XPs7f5CBF5 0f6l8zcHN/cLXVqoJMh8hsbihQ== X-Google-Smtp-Source: AGHT+IH3XNpYfmGvb7OL9Qkhu2zYZC2IvCPU6H6n+N4txNDekG4/DSCJW9S/TxcZ4yyvcTicsIFB7Q== X-Received: by 2002:a67:e8d0:0:b0:452:8717:1fa3 with SMTP id y16-20020a67e8d0000000b0045287171fa3mr10481368vsn.3.1696266850932; Mon, 02 Oct 2023 10:14:10 -0700 (PDT) Received: from localhost.localdomain ([50.212.55.89]) by smtp.gmail.com with ESMTPSA id dy52-20020a05620a60f400b007678973eaa1sm9132660qkb.127.2023.10.02.10.14.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Oct 2023 10:14:10 -0700 (PDT) From: Ben Wolsieffer To: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Ben Wolsieffer Subject: [PATCH 1/2] ARM: dts: stm32: add stm32f7 SDIO sleep pins Date: Mon, 2 Oct 2023 13:13:38 -0400 Message-ID: <20231002171339.1594470-2-ben.wolsieffer@hefring.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231002171339.1594470-1-ben.wolsieffer@hefring.com> References: <20231002171339.1594470-1-ben.wolsieffer@hefring.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add SDIO sleep pin definitions that place the pins in analog mode to save power. Signed-off-by: Ben Wolsieffer --- arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi index 9f65403295ca..26f91ca0d458 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -253,6 +253,17 @@ pins2 { }; }; + sdio_pins_sleep_a: sdio-pins-sleep-a-0 { + pins { + pinmux = , /* SDMMC1 D0 */ + , /* SDMMC1 D1 */ + , /* SDMMC1 D2 */ + , /* SDMMC1 D3 */ + , /* SDMMC1 CLK */ + ; /* SDMMC1 CMD */ + }; + }; + sdio_pins_b: sdio-pins-b-0 { pins { pinmux = , /* SDMMC2 D0 */ @@ -284,6 +295,17 @@ pins2 { }; }; + sdio_pins_sleep_b: sdio-pins-sleep-b-0 { + pins { + pinmux = , /* SDMMC2 D0 */ + , /* SDMMC2 D1 */ + , /* SDMMC2 D2 */ + , /* SDMMC2 D3 */ + , /* SDMMC2 CLK */ + ; /* SDMMC2 CMD */ + }; + }; + can1_pins_a: can1-0 { pins1 { pinmux = ; /* CAN1_TX */