From patchwork Mon Sep 25 22:05:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 726560 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7C14241E0 for ; Mon, 25 Sep 2023 22:05:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5F298C433C8; Mon, 25 Sep 2023 22:05:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1695679524; bh=H4jPOTCta7deecGCFZSg91gHO4eF5tZipTzNxDka1fc=; h=From:To:Cc:Subject:Date:From; b=YsiWcjhPsQdx8BhkOak0BQnIP6/PyKjreGSE1FoJowCn7x4tkGxL2IJWJyN3ePum1 zV9eMnG9xI95nOvPD/AoP3K1bSM+v7jO27cVG0ORvNdYcXiFGRu4GQ98JlBe/3woRl gov+dtq00vnipriX/C4L9TPpr3hVZvNvxc9u/YuVWz+9WnAsfkUahXTJckCrs+ISmI S/1dsZHwd+GjRPHm+YVM9wi3s5a4J/uQSkIo1SVavDbW+GXEfLtpM23hiQ/MSEg7dn U2KXurs33xuWywDZ2mi25KX8oMN8Hs6CbCeWocgqmsJxCDMd8FryfwjR2Dm5X/vd+g nYyKFr3JYWv1w== Received: (nullmailer pid 2026838 invoked by uid 1000); Mon, 25 Sep 2023 22:05:20 -0000 From: Rob Herring To: Suzuki K Poulose , Mike Leach , James Clark , Leo Yan , Krzysztof Kozlowski , Conor Dooley Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: arm,coresight-cti: Drop type for 'cpu' property Date: Mon, 25 Sep 2023 17:05:05 -0500 Message-Id: <20230925220511.2026514-1-robh@kernel.org> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 'cpu' has been added as a single phandle type to dtschema, so drop the type here. Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml index 6216cfb0a188..b9bdfc8969cd 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml @@ -92,7 +92,6 @@ properties: maxItems: 1 cpu: - $ref: /schemas/types.yaml#/definitions/phandle description: Handle to cpu this device is associated with. This must appear in the base cti node if compatible string arm,coresight-cti-v8-arch is used,