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[2a02:8389:41b4:ce80:9ba7:86a5:b5ba:d267]) by smtp.gmail.com with ESMTPSA id c25-20020a170906529900b0099b42c90830sm9016659ejm.36.2023.09.06.06.34.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 06:34:08 -0700 (PDT) From: Javier Carrasco Date: Wed, 06 Sep 2023 15:34:06 +0200 Subject: [PATCH v3] dt-bindings: rtc: mcp795: move to trivial-rtc MIME-Version: 1.0 Message-Id: <20230906-topic-rtc_mcp795_yaml-v3-1-5262f1b39920@gmail.com> X-B4-Tracking: v=1; b=H4sIAM1/+GQC/42N0Q6CIBhGX6VxHQ0wI7rqPVpz8POrbCgOzOWc7 x561V1dnm/7zllIwugwkdthIREnl1zoMxTHA4FW9w1SZzMTwUTBFLvQMQwOaByh6mCQqqxm3Xn KOSuvqJS12pL8NTohNVH30OZ3//I+j0PE2r332OOZuXVpDHHe2xPf1l+ZiVNOLcoSCilNadi96 bTzJwgd2YyT+MsisqVWBuszA6WM+ras6/oBR7f4TBUBAAA= To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Bartczak , Josef Gajdusek Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Javier Carrasco X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1694007247; l=2540; i=javier.carrasco.cruz@gmail.com; s=20230509; h=from:subject:message-id; bh=0ufigzgdB3nUOdg3kxKfESsezXLuBs62lXx3kdgp5GI=; b=sIRbz4FCYwbPOBS2KZF6YkJwkJYmOuMty7JRCNG4PztIO6OHmFaY5K/7+MnnB8z0gxZomHwTb rqcT525QTGuB4nAO6cHOeJtalPJlbNEzR2zfFlx/X/Rb8rZ+Db+Ps7k X-Developer-Key: i=javier.carrasco.cruz@gmail.com; a=ed25519; pk=tIGJV7M+tCizagNijF0eGMBGcOsPD+0cWGfKjl4h6K8= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The current mcp795 bindings in text format do not support validation and are missing the optional interrupt property that is currently supported. Adding the missing property makes the bindings identical to the existing trivial-rtc bindings. Add maxim,mcp795 to the trivial-rtc bindings and delete current .txt bindings Signed-off-by: Javier Carrasco --- The current mcp795 bindings in text format do not support validation and are missing the optional interrupt property that is currently supported. Adding the missing property makes the bindings identical to the existing trivial-rtc bindings. Add maxim,mcp795 to the trivial-rtc bindings and delete current .txt bindings --- Changes in v3: - Order the compatible property alphabetically - Link to v2: https://lore.kernel.org/r/20230906-topic-rtc_mcp795_yaml-v2-1-f9bef40c99b9@gmail.com Changes in v2: - Move mcp795 to trivial-rtc - Link to v1: https://lore.kernel.org/r/20230906-topic-rtc_mcp795_yaml-v1-1-de75c377b5b0@gmail.com --- Documentation/devicetree/bindings/rtc/maxim,mcp795.txt | 11 ----------- Documentation/devicetree/bindings/rtc/trivial-rtc.yaml | 2 ++ 2 files changed, 2 insertions(+), 11 deletions(-) --- base-commit: 2dde18cd1d8fac735875f2e4987f11817cc0bc2c change-id: 20230906-topic-rtc_mcp795_yaml-11058e99ddad Best regards, diff --git a/Documentation/devicetree/bindings/rtc/maxim,mcp795.txt b/Documentation/devicetree/bindings/rtc/maxim,mcp795.txt deleted file mode 100644 index a59fdd8c236d..000000000000 --- a/Documentation/devicetree/bindings/rtc/maxim,mcp795.txt +++ /dev/null @@ -1,11 +0,0 @@ -* Maxim MCP795 SPI Serial Real-Time Clock - -Required properties: -- compatible: Should contain "maxim,mcp795". -- reg: SPI address for chip - -Example: - mcp795: rtc@0 { - compatible = "maxim,mcp795"; - reg = <0>; - }; diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml index 9af77f21bb7f..0928495fa726 100644 --- a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml @@ -47,6 +47,8 @@ properties: - isil,isl1218 # Intersil ISL12022 Real-time Clock - isil,isl12022 + # SPI-BUS INTERFACE REAL TIME CLOCK MODULE + - maxim,mcp795 # Real Time Clock Module with I2C-Bus - microcrystal,rv3029 # Real Time Clock