@@ -205,6 +205,8 @@ &i2c6 {
&mmc0 {
max-frequency = <100000000>;
+ assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
+ assigned-clock-rates = <50000000>;
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
@@ -221,6 +223,8 @@ &mmc0 {
&mmc1 {
max-frequency = <100000000>;
+ assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
+ assigned-clock-rates = <50000000>;
bus-width = <4>;
no-sdio;
no-mmc;
@@ -870,7 +870,6 @@ mmc0: mmc@16010000 {
fifo-depth = <32>;
fifo-watermark-aligned;
data-addr = <0>;
- starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>;
status = "disabled";
};
@@ -886,7 +885,6 @@ mmc1: mmc@16020000 {
fifo-depth = <32>;
fifo-watermark-aligned;
data-addr = <0>;
- starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>;
status = "disabled";
};
Drop unused properties and limit cclk_in to 50M, thus cancelling the internal frequency and adopting the by-pass mode. Signed-off-by: William Qiu <william.qiu@starfivetech.com> --- .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 -- 2 files changed, 4 insertions(+), 2 deletions(-)